lpc82x_pac/spi0/
intstat.rs1#[doc = "Register `INTSTAT` reader"]
2pub struct R(crate::R<INTSTAT_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<INTSTAT_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<INTSTAT_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<INTSTAT_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `INTSTAT` writer"]
17pub struct W(crate::W<INTSTAT_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<INTSTAT_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<INTSTAT_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<INTSTAT_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RXRDY` reader - Receiver Ready flag."]
38pub struct RXRDY_R(crate::FieldReader<bool, bool>);
39impl RXRDY_R {
40 pub(crate) fn new(bits: bool) -> Self {
41 RXRDY_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for RXRDY_R {
45 type Target = crate::FieldReader<bool, bool>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `TXRDY` reader - Transmitter Ready flag."]
52pub struct TXRDY_R(crate::FieldReader<bool, bool>);
53impl TXRDY_R {
54 pub(crate) fn new(bits: bool) -> Self {
55 TXRDY_R(crate::FieldReader::new(bits))
56 }
57}
58impl core::ops::Deref for TXRDY_R {
59 type Target = crate::FieldReader<bool, bool>;
60 #[inline(always)]
61 fn deref(&self) -> &Self::Target {
62 &self.0
63 }
64}
65#[doc = "Field `RXOV` reader - Receiver Overrun interrupt flag."]
66pub struct RXOV_R(crate::FieldReader<bool, bool>);
67impl RXOV_R {
68 pub(crate) fn new(bits: bool) -> Self {
69 RXOV_R(crate::FieldReader::new(bits))
70 }
71}
72impl core::ops::Deref for RXOV_R {
73 type Target = crate::FieldReader<bool, bool>;
74 #[inline(always)]
75 fn deref(&self) -> &Self::Target {
76 &self.0
77 }
78}
79#[doc = "Field `TXUR` reader - Transmitter Underrun interrupt flag."]
80pub struct TXUR_R(crate::FieldReader<bool, bool>);
81impl TXUR_R {
82 pub(crate) fn new(bits: bool) -> Self {
83 TXUR_R(crate::FieldReader::new(bits))
84 }
85}
86impl core::ops::Deref for TXUR_R {
87 type Target = crate::FieldReader<bool, bool>;
88 #[inline(always)]
89 fn deref(&self) -> &Self::Target {
90 &self.0
91 }
92}
93#[doc = "Field `SSA` reader - Slave Select Assert."]
94pub struct SSA_R(crate::FieldReader<bool, bool>);
95impl SSA_R {
96 pub(crate) fn new(bits: bool) -> Self {
97 SSA_R(crate::FieldReader::new(bits))
98 }
99}
100impl core::ops::Deref for SSA_R {
101 type Target = crate::FieldReader<bool, bool>;
102 #[inline(always)]
103 fn deref(&self) -> &Self::Target {
104 &self.0
105 }
106}
107#[doc = "Field `SSD` reader - Slave Select Deassert."]
108pub struct SSD_R(crate::FieldReader<bool, bool>);
109impl SSD_R {
110 pub(crate) fn new(bits: bool) -> Self {
111 SSD_R(crate::FieldReader::new(bits))
112 }
113}
114impl core::ops::Deref for SSD_R {
115 type Target = crate::FieldReader<bool, bool>;
116 #[inline(always)]
117 fn deref(&self) -> &Self::Target {
118 &self.0
119 }
120}
121#[doc = "Field `MSTIDLE` reader - Master Idle status flag."]
122pub struct MSTIDLE_R(crate::FieldReader<bool, bool>);
123impl MSTIDLE_R {
124 pub(crate) fn new(bits: bool) -> Self {
125 MSTIDLE_R(crate::FieldReader::new(bits))
126 }
127}
128impl core::ops::Deref for MSTIDLE_R {
129 type Target = crate::FieldReader<bool, bool>;
130 #[inline(always)]
131 fn deref(&self) -> &Self::Target {
132 &self.0
133 }
134}
135impl R {
136 #[doc = "Bit 0 - Receiver Ready flag."]
137 #[inline(always)]
138 pub fn rxrdy(&self) -> RXRDY_R {
139 RXRDY_R::new((self.bits & 0x01) != 0)
140 }
141 #[doc = "Bit 1 - Transmitter Ready flag."]
142 #[inline(always)]
143 pub fn txrdy(&self) -> TXRDY_R {
144 TXRDY_R::new(((self.bits >> 1) & 0x01) != 0)
145 }
146 #[doc = "Bit 2 - Receiver Overrun interrupt flag."]
147 #[inline(always)]
148 pub fn rxov(&self) -> RXOV_R {
149 RXOV_R::new(((self.bits >> 2) & 0x01) != 0)
150 }
151 #[doc = "Bit 3 - Transmitter Underrun interrupt flag."]
152 #[inline(always)]
153 pub fn txur(&self) -> TXUR_R {
154 TXUR_R::new(((self.bits >> 3) & 0x01) != 0)
155 }
156 #[doc = "Bit 4 - Slave Select Assert."]
157 #[inline(always)]
158 pub fn ssa(&self) -> SSA_R {
159 SSA_R::new(((self.bits >> 4) & 0x01) != 0)
160 }
161 #[doc = "Bit 5 - Slave Select Deassert."]
162 #[inline(always)]
163 pub fn ssd(&self) -> SSD_R {
164 SSD_R::new(((self.bits >> 5) & 0x01) != 0)
165 }
166 #[doc = "Bit 8 - Master Idle status flag."]
167 #[inline(always)]
168 pub fn mstidle(&self) -> MSTIDLE_R {
169 MSTIDLE_R::new(((self.bits >> 8) & 0x01) != 0)
170 }
171}
172impl W {
173 #[doc = "Writes raw bits to the register."]
174 #[inline(always)]
175 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
176 self.0.bits(bits);
177 self
178 }
179}
180#[doc = "SPI Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intstat](index.html) module"]
181pub struct INTSTAT_SPEC;
182impl crate::RegisterSpec for INTSTAT_SPEC {
183 type Ux = u32;
184}
185#[doc = "`read()` method returns [intstat::R](R) reader structure"]
186impl crate::Readable for INTSTAT_SPEC {
187 type Reader = R;
188}
189#[doc = "`write(|w| ..)` method takes [intstat::W](W) writer structure"]
190impl crate::Writable for INTSTAT_SPEC {
191 type Writer = W;
192}
193#[doc = "`reset()` method sets INTSTAT to value 0x02"]
194impl crate::Resettable for INTSTAT_SPEC {
195 #[inline(always)]
196 fn reset_value() -> Self::Ux {
197 0x02
198 }
199}