lpc82x_pac/sct0/
capctrl_matchrel_sctcapctrl3.rs1#[doc = "Register `SCTCAPCTRL3` reader"]
2pub struct R(crate::R<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SCTCAPCTRL3` writer"]
17pub struct W(crate::W<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CAPCONn_L` reader - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
38pub struct CAPCONN_L_R(crate::FieldReader<u8, u8>);
39impl CAPCONN_L_R {
40 pub(crate) fn new(bits: u8) -> Self {
41 CAPCONN_L_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for CAPCONN_L_R {
45 type Target = crate::FieldReader<u8, u8>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `CAPCONn_L` writer - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
52pub struct CAPCONN_L_W<'a> {
53 w: &'a mut W,
54}
55impl<'a> CAPCONN_L_W<'a> {
56 #[doc = r"Writes raw bits to the field"]
57 #[inline(always)]
58 pub unsafe fn bits(self, value: u8) -> &'a mut W {
59 self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
60 self.w
61 }
62}
63#[doc = "Field `CAPCONn_H` reader - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
64pub struct CAPCONN_H_R(crate::FieldReader<u8, u8>);
65impl CAPCONN_H_R {
66 pub(crate) fn new(bits: u8) -> Self {
67 CAPCONN_H_R(crate::FieldReader::new(bits))
68 }
69}
70impl core::ops::Deref for CAPCONN_H_R {
71 type Target = crate::FieldReader<u8, u8>;
72 #[inline(always)]
73 fn deref(&self) -> &Self::Target {
74 &self.0
75 }
76}
77#[doc = "Field `CAPCONn_H` writer - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
78pub struct CAPCONN_H_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> CAPCONN_H_W<'a> {
82 #[doc = r"Writes raw bits to the field"]
83 #[inline(always)]
84 pub unsafe fn bits(self, value: u8) -> &'a mut W {
85 self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
86 self.w
87 }
88}
89impl R {
90 #[doc = "Bits 0:7 - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
91 #[inline(always)]
92 pub fn capconn_l(&self) -> CAPCONN_L_R {
93 CAPCONN_L_R::new((self.bits & 0xff) as u8)
94 }
95 #[doc = "Bits 16:23 - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
96 #[inline(always)]
97 pub fn capconn_h(&self) -> CAPCONN_H_R {
98 CAPCONN_H_R::new(((self.bits >> 16) & 0xff) as u8)
99 }
100}
101impl W {
102 #[doc = "Bits 0:7 - If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1, etc.). The number of bits = number of match/captures in this SCT."]
103 #[inline(always)]
104 pub fn capconn_l(&mut self) -> CAPCONN_L_W {
105 CAPCONN_L_W { w: self }
106 }
107 #[doc = "Bits 16:23 - If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17, etc.). The number of bits = number of match/captures in this SCT."]
108 #[inline(always)]
109 pub fn capconn_h(&mut self) -> CAPCONN_H_W {
110 CAPCONN_H_W { w: self }
111 }
112 #[doc = "Writes raw bits to the register."]
113 #[inline(always)]
114 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
115 self.0.bits(bits);
116 self
117 }
118}
119#[doc = "SCT capture control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [capctrl_matchrel_sctcapctrl3](index.html) module"]
120pub struct CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC;
121impl crate::RegisterSpec for CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC {
122 type Ux = u32;
123}
124#[doc = "`read()` method returns [capctrl_matchrel_sctcapctrl3::R](R) reader structure"]
125impl crate::Readable for CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC {
126 type Reader = R;
127}
128#[doc = "`write(|w| ..)` method takes [capctrl_matchrel_sctcapctrl3::W](W) writer structure"]
129impl crate::Writable for CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC {
130 type Writer = W;
131}
132#[doc = "`reset()` method sets SCTCAPCTRL3 to value 0"]
133impl crate::Resettable for CAPCTRL_MATCHREL_SCTCAPCTRL3_SPEC {
134 #[inline(always)]
135 fn reset_value() -> Self::Ux {
136 0
137 }
138}