lpc82x_pac/mrt0/
irq_flag.rs1#[doc = "Register `IRQ_FLAG` reader"]
2pub struct R(crate::R<IRQ_FLAG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<IRQ_FLAG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<IRQ_FLAG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<IRQ_FLAG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `IRQ_FLAG` writer"]
17pub struct W(crate::W<IRQ_FLAG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<IRQ_FLAG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<IRQ_FLAG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<IRQ_FLAG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Monitors the interrupt flag of TIMER0.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum GFLAG0_A {
40 #[doc = "0: No pending interrupt. Writing a zero is equivalent to no operation."]
41 NO_PENDING_INTERRUPT = 0,
42 #[doc = "1: Pending interrupt. The interrupt is pending because TIMER0 has reached the end of the time interval. If the INTEN bit in the CONTROL0 register is also set to 1, the interrupt for timer channel 0 and the global interrupt are raised. Writing a 1 to this bit clears the interrupt request."]
43 PENDING_INTERRUPT = 1,
44}
45impl From<GFLAG0_A> for bool {
46 #[inline(always)]
47 fn from(variant: GFLAG0_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `GFLAG0` reader - Monitors the interrupt flag of TIMER0."]
52pub struct GFLAG0_R(crate::FieldReader<bool, GFLAG0_A>);
53impl GFLAG0_R {
54 pub(crate) fn new(bits: bool) -> Self {
55 GFLAG0_R(crate::FieldReader::new(bits))
56 }
57 #[doc = r"Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> GFLAG0_A {
60 match self.bits {
61 false => GFLAG0_A::NO_PENDING_INTERRUPT,
62 true => GFLAG0_A::PENDING_INTERRUPT,
63 }
64 }
65 #[doc = "Checks if the value of the field is `NO_PENDING_INTERRUPT`"]
66 #[inline(always)]
67 pub fn is_no_pending_interrupt(&self) -> bool {
68 **self == GFLAG0_A::NO_PENDING_INTERRUPT
69 }
70 #[doc = "Checks if the value of the field is `PENDING_INTERRUPT`"]
71 #[inline(always)]
72 pub fn is_pending_interrupt(&self) -> bool {
73 **self == GFLAG0_A::PENDING_INTERRUPT
74 }
75}
76impl core::ops::Deref for GFLAG0_R {
77 type Target = crate::FieldReader<bool, GFLAG0_A>;
78 #[inline(always)]
79 fn deref(&self) -> &Self::Target {
80 &self.0
81 }
82}
83#[doc = "Field `GFLAG0` writer - Monitors the interrupt flag of TIMER0."]
84pub struct GFLAG0_W<'a> {
85 w: &'a mut W,
86}
87impl<'a> GFLAG0_W<'a> {
88 #[doc = r"Writes `variant` to the field"]
89 #[inline(always)]
90 pub fn variant(self, variant: GFLAG0_A) -> &'a mut W {
91 self.bit(variant.into())
92 }
93 #[doc = "No pending interrupt. Writing a zero is equivalent to no operation."]
94 #[inline(always)]
95 pub fn no_pending_interrupt(self) -> &'a mut W {
96 self.variant(GFLAG0_A::NO_PENDING_INTERRUPT)
97 }
98 #[doc = "Pending interrupt. The interrupt is pending because TIMER0 has reached the end of the time interval. If the INTEN bit in the CONTROL0 register is also set to 1, the interrupt for timer channel 0 and the global interrupt are raised. Writing a 1 to this bit clears the interrupt request."]
99 #[inline(always)]
100 pub fn pending_interrupt(self) -> &'a mut W {
101 self.variant(GFLAG0_A::PENDING_INTERRUPT)
102 }
103 #[doc = r"Sets the field bit"]
104 #[inline(always)]
105 pub fn set_bit(self) -> &'a mut W {
106 self.bit(true)
107 }
108 #[doc = r"Clears the field bit"]
109 #[inline(always)]
110 pub fn clear_bit(self) -> &'a mut W {
111 self.bit(false)
112 }
113 #[doc = r"Writes raw bits to the field"]
114 #[inline(always)]
115 pub fn bit(self, value: bool) -> &'a mut W {
116 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
117 self.w
118 }
119}
120#[doc = "Field `GFLAG1` reader - Monitors the interrupt flag of TIMER1. See description of channel 0."]
121pub struct GFLAG1_R(crate::FieldReader<bool, bool>);
122impl GFLAG1_R {
123 pub(crate) fn new(bits: bool) -> Self {
124 GFLAG1_R(crate::FieldReader::new(bits))
125 }
126}
127impl core::ops::Deref for GFLAG1_R {
128 type Target = crate::FieldReader<bool, bool>;
129 #[inline(always)]
130 fn deref(&self) -> &Self::Target {
131 &self.0
132 }
133}
134#[doc = "Field `GFLAG1` writer - Monitors the interrupt flag of TIMER1. See description of channel 0."]
135pub struct GFLAG1_W<'a> {
136 w: &'a mut W,
137}
138impl<'a> GFLAG1_W<'a> {
139 #[doc = r"Sets the field bit"]
140 #[inline(always)]
141 pub fn set_bit(self) -> &'a mut W {
142 self.bit(true)
143 }
144 #[doc = r"Clears the field bit"]
145 #[inline(always)]
146 pub fn clear_bit(self) -> &'a mut W {
147 self.bit(false)
148 }
149 #[doc = r"Writes raw bits to the field"]
150 #[inline(always)]
151 pub fn bit(self, value: bool) -> &'a mut W {
152 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
153 self.w
154 }
155}
156#[doc = "Field `GFLAG2` reader - Monitors the interrupt flag of TIMER2. See description of channel 0."]
157pub struct GFLAG2_R(crate::FieldReader<bool, bool>);
158impl GFLAG2_R {
159 pub(crate) fn new(bits: bool) -> Self {
160 GFLAG2_R(crate::FieldReader::new(bits))
161 }
162}
163impl core::ops::Deref for GFLAG2_R {
164 type Target = crate::FieldReader<bool, bool>;
165 #[inline(always)]
166 fn deref(&self) -> &Self::Target {
167 &self.0
168 }
169}
170#[doc = "Field `GFLAG2` writer - Monitors the interrupt flag of TIMER2. See description of channel 0."]
171pub struct GFLAG2_W<'a> {
172 w: &'a mut W,
173}
174impl<'a> GFLAG2_W<'a> {
175 #[doc = r"Sets the field bit"]
176 #[inline(always)]
177 pub fn set_bit(self) -> &'a mut W {
178 self.bit(true)
179 }
180 #[doc = r"Clears the field bit"]
181 #[inline(always)]
182 pub fn clear_bit(self) -> &'a mut W {
183 self.bit(false)
184 }
185 #[doc = r"Writes raw bits to the field"]
186 #[inline(always)]
187 pub fn bit(self, value: bool) -> &'a mut W {
188 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
189 self.w
190 }
191}
192#[doc = "Field `GFLAG3` reader - Monitors the interrupt flag of TIMER3. See description of channel 0."]
193pub struct GFLAG3_R(crate::FieldReader<bool, bool>);
194impl GFLAG3_R {
195 pub(crate) fn new(bits: bool) -> Self {
196 GFLAG3_R(crate::FieldReader::new(bits))
197 }
198}
199impl core::ops::Deref for GFLAG3_R {
200 type Target = crate::FieldReader<bool, bool>;
201 #[inline(always)]
202 fn deref(&self) -> &Self::Target {
203 &self.0
204 }
205}
206#[doc = "Field `GFLAG3` writer - Monitors the interrupt flag of TIMER3. See description of channel 0."]
207pub struct GFLAG3_W<'a> {
208 w: &'a mut W,
209}
210impl<'a> GFLAG3_W<'a> {
211 #[doc = r"Sets the field bit"]
212 #[inline(always)]
213 pub fn set_bit(self) -> &'a mut W {
214 self.bit(true)
215 }
216 #[doc = r"Clears the field bit"]
217 #[inline(always)]
218 pub fn clear_bit(self) -> &'a mut W {
219 self.bit(false)
220 }
221 #[doc = r"Writes raw bits to the field"]
222 #[inline(always)]
223 pub fn bit(self, value: bool) -> &'a mut W {
224 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
225 self.w
226 }
227}
228impl R {
229 #[doc = "Bit 0 - Monitors the interrupt flag of TIMER0."]
230 #[inline(always)]
231 pub fn gflag0(&self) -> GFLAG0_R {
232 GFLAG0_R::new((self.bits & 0x01) != 0)
233 }
234 #[doc = "Bit 1 - Monitors the interrupt flag of TIMER1. See description of channel 0."]
235 #[inline(always)]
236 pub fn gflag1(&self) -> GFLAG1_R {
237 GFLAG1_R::new(((self.bits >> 1) & 0x01) != 0)
238 }
239 #[doc = "Bit 2 - Monitors the interrupt flag of TIMER2. See description of channel 0."]
240 #[inline(always)]
241 pub fn gflag2(&self) -> GFLAG2_R {
242 GFLAG2_R::new(((self.bits >> 2) & 0x01) != 0)
243 }
244 #[doc = "Bit 3 - Monitors the interrupt flag of TIMER3. See description of channel 0."]
245 #[inline(always)]
246 pub fn gflag3(&self) -> GFLAG3_R {
247 GFLAG3_R::new(((self.bits >> 3) & 0x01) != 0)
248 }
249}
250impl W {
251 #[doc = "Bit 0 - Monitors the interrupt flag of TIMER0."]
252 #[inline(always)]
253 pub fn gflag0(&mut self) -> GFLAG0_W {
254 GFLAG0_W { w: self }
255 }
256 #[doc = "Bit 1 - Monitors the interrupt flag of TIMER1. See description of channel 0."]
257 #[inline(always)]
258 pub fn gflag1(&mut self) -> GFLAG1_W {
259 GFLAG1_W { w: self }
260 }
261 #[doc = "Bit 2 - Monitors the interrupt flag of TIMER2. See description of channel 0."]
262 #[inline(always)]
263 pub fn gflag2(&mut self) -> GFLAG2_W {
264 GFLAG2_W { w: self }
265 }
266 #[doc = "Bit 3 - Monitors the interrupt flag of TIMER3. See description of channel 0."]
267 #[inline(always)]
268 pub fn gflag3(&mut self) -> GFLAG3_W {
269 GFLAG3_W { w: self }
270 }
271 #[doc = "Writes raw bits to the register."]
272 #[inline(always)]
273 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
274 self.0.bits(bits);
275 self
276 }
277}
278#[doc = "Global interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_flag](index.html) module"]
279pub struct IRQ_FLAG_SPEC;
280impl crate::RegisterSpec for IRQ_FLAG_SPEC {
281 type Ux = u32;
282}
283#[doc = "`read()` method returns [irq_flag::R](R) reader structure"]
284impl crate::Readable for IRQ_FLAG_SPEC {
285 type Reader = R;
286}
287#[doc = "`write(|w| ..)` method takes [irq_flag::W](W) writer structure"]
288impl crate::Writable for IRQ_FLAG_SPEC {
289 type Writer = W;
290}
291#[doc = "`reset()` method sets IRQ_FLAG to value 0"]
292impl crate::Resettable for IRQ_FLAG_SPEC {
293 #[inline(always)]
294 fn reset_value() -> Self::Ux {
295 0
296 }
297}