lpc82x_pac/adc0/
seq_gdat.rs1#[doc = "Register `SEQ_GDAT%s` reader"]
2pub struct R(crate::R<SEQ_GDAT_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SEQ_GDAT_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SEQ_GDAT_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SEQ_GDAT_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SEQ_GDAT%s` writer"]
17pub struct W(crate::W<SEQ_GDAT_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SEQ_GDAT_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SEQ_GDAT_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SEQ_GDAT_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RESULT` reader - This field contains the 12-bit ADC conversion result from the most recent conversion performed under conversion sequence associated with this register. The result is a binary fraction representing the voltage on the currently-selected input channel as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the input pin was less than, equal to, or close to that on VREFN, while 0xFFF indicates that the voltage on the input was close to, equal to, or greater than that on VREFP. DATAVALID = 1 indicates that this result has not yet been read."]
38pub struct RESULT_R(crate::FieldReader<u16, u16>);
39impl RESULT_R {
40 pub(crate) fn new(bits: u16) -> Self {
41 RESULT_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for RESULT_R {
45 type Target = crate::FieldReader<u16, u16>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `RESULT` writer - This field contains the 12-bit ADC conversion result from the most recent conversion performed under conversion sequence associated with this register. The result is a binary fraction representing the voltage on the currently-selected input channel as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the input pin was less than, equal to, or close to that on VREFN, while 0xFFF indicates that the voltage on the input was close to, equal to, or greater than that on VREFP. DATAVALID = 1 indicates that this result has not yet been read."]
52pub struct RESULT_W<'a> {
53 w: &'a mut W,
54}
55impl<'a> RESULT_W<'a> {
56 #[doc = r"Writes raw bits to the field"]
57 #[inline(always)]
58 pub unsafe fn bits(self, value: u16) -> &'a mut W {
59 self.w.bits = (self.w.bits & !(0x0fff << 4)) | ((value as u32 & 0x0fff) << 4);
60 self.w
61 }
62}
63#[doc = "Field `THCMPRANGE` reader - Indicates whether the result of the last conversion performed was above, below or within the range established by the designated threshold comparison registers (THRn_LOW and THRn_HIGH)."]
64pub struct THCMPRANGE_R(crate::FieldReader<u8, u8>);
65impl THCMPRANGE_R {
66 pub(crate) fn new(bits: u8) -> Self {
67 THCMPRANGE_R(crate::FieldReader::new(bits))
68 }
69}
70impl core::ops::Deref for THCMPRANGE_R {
71 type Target = crate::FieldReader<u8, u8>;
72 #[inline(always)]
73 fn deref(&self) -> &Self::Target {
74 &self.0
75 }
76}
77#[doc = "Field `THCMPCROSS` reader - Indicates whether the result of the last conversion performed represented a crossing of the threshold level established by the designated LOW threshold comparison register (THRn_LOW) and, if so, in what direction the crossing occurred."]
78pub struct THCMPCROSS_R(crate::FieldReader<u8, u8>);
79impl THCMPCROSS_R {
80 pub(crate) fn new(bits: u8) -> Self {
81 THCMPCROSS_R(crate::FieldReader::new(bits))
82 }
83}
84impl core::ops::Deref for THCMPCROSS_R {
85 type Target = crate::FieldReader<u8, u8>;
86 #[inline(always)]
87 fn deref(&self) -> &Self::Target {
88 &self.0
89 }
90}
91#[doc = "Field `CHN` reader - These bits contain the channel from which the RESULT bits were converted (e.g. 0000 identifies channel 0, 0001 channel 1, etc.)."]
92pub struct CHN_R(crate::FieldReader<u8, u8>);
93impl CHN_R {
94 pub(crate) fn new(bits: u8) -> Self {
95 CHN_R(crate::FieldReader::new(bits))
96 }
97}
98impl core::ops::Deref for CHN_R {
99 type Target = crate::FieldReader<u8, u8>;
100 #[inline(always)]
101 fn deref(&self) -> &Self::Target {
102 &self.0
103 }
104}
105#[doc = "Field `OVERRUN` reader - This bit is set if a new conversion result is loaded into the RESULT field before a previous result has been read - i.e. while the DATAVALID bit is set. This bit is cleared, along with the DATAVALID bit, whenever this register is read. This bit will contribute to an overrun interrupt/DMA trigger if the MODE bit (in SEQAA_CTRL) for the corresponding sequence is set to '0' (and if the overrun interrupt is enabled)."]
106pub struct OVERRUN_R(crate::FieldReader<bool, bool>);
107impl OVERRUN_R {
108 pub(crate) fn new(bits: bool) -> Self {
109 OVERRUN_R(crate::FieldReader::new(bits))
110 }
111}
112impl core::ops::Deref for OVERRUN_R {
113 type Target = crate::FieldReader<bool, bool>;
114 #[inline(always)]
115 fn deref(&self) -> &Self::Target {
116 &self.0
117 }
118}
119#[doc = "Field `DATAVALID` reader - This bit is set to '1' at the end of each conversion when a new result is loaded into the RESULT field. It is cleared whenever this register is read. This bit will cause a conversion-complete interrupt for the corresponding sequence if the MODE bit (in SEQA_CTRL) for that sequence is set to 0 (and if the interrupt is enabled)."]
120pub struct DATAVALID_R(crate::FieldReader<bool, bool>);
121impl DATAVALID_R {
122 pub(crate) fn new(bits: bool) -> Self {
123 DATAVALID_R(crate::FieldReader::new(bits))
124 }
125}
126impl core::ops::Deref for DATAVALID_R {
127 type Target = crate::FieldReader<bool, bool>;
128 #[inline(always)]
129 fn deref(&self) -> &Self::Target {
130 &self.0
131 }
132}
133impl R {
134 #[doc = "Bits 4:15 - This field contains the 12-bit ADC conversion result from the most recent conversion performed under conversion sequence associated with this register. The result is a binary fraction representing the voltage on the currently-selected input channel as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the input pin was less than, equal to, or close to that on VREFN, while 0xFFF indicates that the voltage on the input was close to, equal to, or greater than that on VREFP. DATAVALID = 1 indicates that this result has not yet been read."]
135 #[inline(always)]
136 pub fn result(&self) -> RESULT_R {
137 RESULT_R::new(((self.bits >> 4) & 0x0fff) as u16)
138 }
139 #[doc = "Bits 16:17 - Indicates whether the result of the last conversion performed was above, below or within the range established by the designated threshold comparison registers (THRn_LOW and THRn_HIGH)."]
140 #[inline(always)]
141 pub fn thcmprange(&self) -> THCMPRANGE_R {
142 THCMPRANGE_R::new(((self.bits >> 16) & 0x03) as u8)
143 }
144 #[doc = "Bits 18:19 - Indicates whether the result of the last conversion performed represented a crossing of the threshold level established by the designated LOW threshold comparison register (THRn_LOW) and, if so, in what direction the crossing occurred."]
145 #[inline(always)]
146 pub fn thcmpcross(&self) -> THCMPCROSS_R {
147 THCMPCROSS_R::new(((self.bits >> 18) & 0x03) as u8)
148 }
149 #[doc = "Bits 26:29 - These bits contain the channel from which the RESULT bits were converted (e.g. 0000 identifies channel 0, 0001 channel 1, etc.)."]
150 #[inline(always)]
151 pub fn chn(&self) -> CHN_R {
152 CHN_R::new(((self.bits >> 26) & 0x0f) as u8)
153 }
154 #[doc = "Bit 30 - This bit is set if a new conversion result is loaded into the RESULT field before a previous result has been read - i.e. while the DATAVALID bit is set. This bit is cleared, along with the DATAVALID bit, whenever this register is read. This bit will contribute to an overrun interrupt/DMA trigger if the MODE bit (in SEQAA_CTRL) for the corresponding sequence is set to '0' (and if the overrun interrupt is enabled)."]
155 #[inline(always)]
156 pub fn overrun(&self) -> OVERRUN_R {
157 OVERRUN_R::new(((self.bits >> 30) & 0x01) != 0)
158 }
159 #[doc = "Bit 31 - This bit is set to '1' at the end of each conversion when a new result is loaded into the RESULT field. It is cleared whenever this register is read. This bit will cause a conversion-complete interrupt for the corresponding sequence if the MODE bit (in SEQA_CTRL) for that sequence is set to 0 (and if the interrupt is enabled)."]
160 #[inline(always)]
161 pub fn datavalid(&self) -> DATAVALID_R {
162 DATAVALID_R::new(((self.bits >> 31) & 0x01) != 0)
163 }
164}
165impl W {
166 #[doc = "Bits 4:15 - This field contains the 12-bit ADC conversion result from the most recent conversion performed under conversion sequence associated with this register. The result is a binary fraction representing the voltage on the currently-selected input channel as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the input pin was less than, equal to, or close to that on VREFN, while 0xFFF indicates that the voltage on the input was close to, equal to, or greater than that on VREFP. DATAVALID = 1 indicates that this result has not yet been read."]
167 #[inline(always)]
168 pub fn result(&mut self) -> RESULT_W {
169 RESULT_W { w: self }
170 }
171 #[doc = "Writes raw bits to the register."]
172 #[inline(always)]
173 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
174 self.0.bits(bits);
175 self
176 }
177}
178#[doc = "ADC Sequence-n Global Data register. This register contains the result of the most recent ADC conversion performed under sequence-n.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [seq_gdat](index.html) module"]
179pub struct SEQ_GDAT_SPEC;
180impl crate::RegisterSpec for SEQ_GDAT_SPEC {
181 type Ux = u32;
182}
183#[doc = "`read()` method returns [seq_gdat::R](R) reader structure"]
184impl crate::Readable for SEQ_GDAT_SPEC {
185 type Reader = R;
186}
187#[doc = "`write(|w| ..)` method takes [seq_gdat::W](W) writer structure"]
188impl crate::Writable for SEQ_GDAT_SPEC {
189 type Writer = W;
190}
191#[doc = "`reset()` method sets SEQ_GDAT%s to value 0"]
192impl crate::Resettable for SEQ_GDAT_SPEC {
193 #[inline(always)]
194 fn reset_value() -> Self::Ux {
195 0
196 }
197}