Struct lpc81x_pac::lpc812::swm0::pinenable0::PINENABLE0_SPEC
source · pub struct PINENABLE0_SPEC;
Expand description
Pin enable register 0. Enables fixed-pin functions ACMP_I0, ACMP_I1, SWCLK, SWDIO, XTALIN, XTALOUT, RESET, CLKIN, VDDCMP and so on.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see pinenable0 module
Trait Implementations§
source§impl Readable for PINENABLE0_SPEC
impl Readable for PINENABLE0_SPEC
read()
method returns pinenable0::R reader structure
source§impl RegisterSpec for PINENABLE0_SPEC
impl RegisterSpec for PINENABLE0_SPEC
source§impl Resettable for PINENABLE0_SPEC
impl Resettable for PINENABLE0_SPEC
reset()
method sets PINENABLE0 to value 0x01b3
source§fn reset_value() -> Self::Ux
fn reset_value() -> Self::Ux
Reset value of the register.
source§impl Writable for PINENABLE0_SPEC
impl Writable for PINENABLE0_SPEC
write(|w| ..)
method takes pinenable0::W writer structure