Struct lpc81x_pac::lpc811::swm0::pinenable0::PINENABLE0_SPEC

pub struct PINENABLE0_SPEC;

Pin enable register 0. Enables fixed-pin functions ACMP_I0, ACMP_I1, SWCLK, SWDIO, XTALIN, XTALOUT, RESET, CLKIN, VDDCMP and so on.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see pinenable0 module

Trait Implementations

impl Readable for PINENABLE0_SPEC

read() method returns pinenable0::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for PINENABLE0_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for PINENABLE0_SPEC

reset() method sets PINENABLE0 to value 0x01b3

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for PINENABLE0_SPEC

write(|w| ..) method takes pinenable0::W writer structure

type Writer = W

Writer type argument to write, et al.