[−][src]Struct lpc81x_pac::spi0::div::W
Value to write to the register
Methods
impl W[src]
pub fn reset_value() -> W[src]
Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]
Writes raw bits to the register
pub fn divval(&mut self) -> _DIVVALW[src]
Bits 0:15 - Rate divider value -1. Specifies how the PCLK for the SPI is divided to produce the SPI clock rate in master mode. DIVVAL is -1 encoded such that the value 0 results in PCLK/1, the value 1 results in PCLK/2, etc. the maximum possible divide is for the value 0xFFFF, which results in PCLK/65536.
Auto Trait Implementations
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impl<T, U> TryFrom<U> for T where
U: Into<T>, [src]
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The type returned in the event of a conversion error.
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impl<T, U> Into<U> for T where
U: From<T>, [src]
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impl<T> From<T> for T[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>, [src]
U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>[src]
impl<T> Borrow<T> for T where
T: ?Sized, [src]
T: ?Sized,
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Should always be Self