[][src]Struct lpc81x_pac::i2c::RegisterBlock

#[repr(C)]
pub struct RegisterBlock { pub cfg: CFG, pub stat: STAT, pub intenset: INTENSET, pub intenclr: INTENCLR, pub timeout: TIMEOUT, pub div: DIV, pub intstat: INTSTAT, pub mstctl: MSTCTL, pub msttime: MSTTIME, pub mstdat: MSTDAT, pub slvctl: SLVCTL, pub slvdat: SLVDAT, pub slvadr: [SLVADR; 4], pub slvqual0: SLVQUAL0, pub monrxdat: MONRXDAT, // some fields omitted }

Register block

Fields

cfg: CFG

0x00 - Configuration for shared functions.

stat: STAT

0x04 - Status register for Master, Slave, and Monitor functions.

intenset: INTENSET

0x08 - Interrupt Enable Set and read register.

intenclr: INTENCLR

0x0c - Interrupt Enable Clear register.

timeout: TIMEOUT

0x10 - Time-out value register.

div: DIV

0x14 - Clock pre-divider for the entire I2C block. This determines what time increments are used for the MSTTIME and SLVTIME registers.

intstat: INTSTAT

0x18 - Interrupt Status register for Master, Slave, and Monitor functions.

mstctl: MSTCTL

0x20 - Master control register.

msttime: MSTTIME

0x24 - Master timing configuration.

mstdat: MSTDAT

0x28 - Combined Master receiver and transmitter data register.

slvctl: SLVCTL

0x40 - Slave control register.

slvdat: SLVDAT

0x44 - Combined Slave receiver and transmitter data register.

slvadr: [SLVADR; 4]

0x48 - Slave address 0.

slvqual0: SLVQUAL0

0x58 - Slave Qualification for address 0.

monrxdat: MONRXDAT

0x80 - Monitor receiver data register.

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