Struct lpc81x_pac::sct::ev5_ctrl::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn matchsel(&self) -> MATCHSELR

Bits 0:3 - Selects the Match register associated with this event (if any). A match can occur only when the counter selected by the HEVENT bit is running.

pub fn hevent(&self) -> HEVENTR

Bit 4 - Select L/H counter. Do not set this bit if UNIFY = 1.

pub fn outsel(&self) -> OUTSELR

Bit 5 - Input/output select

pub fn iosel(&self) -> IOSELR

Bits 6:9 - Selects the input or output signal associated with this event (if any). Do not select an input in this register, if CKMODE is 1x. In this case the clock input is an implicit ingredient of every event.

pub fn iocond(&self) -> IOCONDR

Bits 10:11 - Selects the I/O condition for event n. (The detection of edges on outputs lag the conditions that switch the outputs by one SCT clock). In order to guarantee proper edge/state detection, an input must have a minimum pulse width of at least one SCT clock period .

pub fn combmode(&self) -> COMBMODER

Bits 12:13 - Selects how the specified match and I/O condition are used and combined.

pub fn stateld(&self) -> STATELDR

Bit 14 - This bit controls how the STATEV value modifies the state selected by HEVENT when this event is the highest-numbered event occurring for that state.

pub fn statev(&self) -> STATEVR

Bits 15:19 - This value is loaded into or added to the state selected by HEVENT, depending on STATELD, when this event is the highest-numbered event occurring for that state. If STATELD and STATEV are both zero, there is no change to the STATE value.

pub fn matchmem(&self) -> MATCHMEMR

Bit 20 - If this bit is one and the COMBMODE field specifies a match component to the triggering of this event, then a match is considered to be active whenever the counter value is GREATER THAN OR EQUAL TO the value specified in the match register when counting up, LESS THEN OR EQUAL TO the match value when counting down. If this bit is zero, a match is only be active during the cycle when the counter is equal to the match value.

pub fn direction(&self) -> DIRECTIONR

Bits 21:22 - Direction qualifier for event generation. This field only applies when the counters are operating in BIDIR mode. If BIDIR = 0, the SCT ignores this field. Value 0x3 is reserved.