1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93
#[doc = "Writer for register INTENCLR"] pub type W = crate::W<u32, super::INTENCLR>; #[doc = "Register INTENCLR `reset()`'s with value 0"] impl crate::ResetValue for super::INTENCLR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Write proxy for field `SSAEN`"] pub struct SSAEN_W<'a> { w: &'a mut W, } impl<'a> SSAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Write proxy for field `SSDEN`"] pub struct SSDEN_W<'a> { w: &'a mut W, } impl<'a> SSDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Write proxy for field `MSTIDLE`"] pub struct MSTIDLE_W<'a> { w: &'a mut W, } impl<'a> MSTIDLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } impl W { #[doc = "Bit 4 - Writing 1 clears the corresponding bit in the INTENSET register."] #[inline(always)] pub fn ssaen(&mut self) -> SSAEN_W { SSAEN_W { w: self } } #[doc = "Bit 5 - Writing 1 clears the corresponding bit in the INTENSET register."] #[inline(always)] pub fn ssden(&mut self) -> SSDEN_W { SSDEN_W { w: self } } #[doc = "Bit 8 - Writing 1 clears the corresponding bit in the INTENSET register."] #[inline(always)] pub fn mstidle(&mut self) -> MSTIDLE_W { MSTIDLE_W { w: self } } }