[−][src]Module lpc55s6x_pac::usart0::fifocfg
FIFO configuration and enable register.
Structs
DMARX_W | Write proxy for field |
DMATX_W | Write proxy for field |
EMPTYRX_W | Write proxy for field |
EMPTYTX_W | Write proxy for field |
ENABLERX_W | Write proxy for field |
ENABLETX_W | Write proxy for field |
WAKERX_W | Write proxy for field |
WAKETX_W | Write proxy for field |
Enums
DMARX_A | DMA configuration for receive. |
DMATX_A | DMA configuration for transmit. |
ENABLERX_A | Enable the receive FIFO. |
ENABLETX_A | Enable the transmit FIFO. |
WAKERX_A | Wake-up for receive FIFO level. This allows the device to be woken from reduced power modes (up to power-down, as long as the peripheral function works in that power mode) without enabling the TXLVL interrupt. Only DMA wakes up, processes data, and goes back to sleep. The CPU will remain stopped until woken by another cause, such as DMA completion. See Hardware Wake-up control register. |
WAKETX_A | Wake-up for transmit FIFO level. This allows the device to be woken from reduced power modes (up to power-down, as long as the peripheral function works in that power mode) without enabling the TXLVL interrupt. Only DMA wakes up, processes data, and goes back to sleep. The CPU will remain stopped until woken by another cause, such as DMA completion. See Hardware Wake-up control register. |
Type Definitions
DMARX_R | Reader of field |
DMATX_R | Reader of field |
EMPTYRX_R | Reader of field |
EMPTYTX_R | Reader of field |
ENABLERX_R | Reader of field |
ENABLETX_R | Reader of field |
R | Reader of register FIFOCFG |
SIZE_R | Reader of field |
W | Writer for register FIFOCFG |
WAKERX_R | Reader of field |
WAKETX_R | Reader of field |