Enum lpc55s6x_pac::syscon::fcclksel3::SEL_A

#[repr(u8)]
pub enum SEL_A {
    ENUM_0X0,
    ENUM_0X1,
    ENUM_0X2,
    ENUM_0X3,
    ENUM_0X4,
    ENUM_0X5,
    ENUM_0X6,
    ENUM_0X7,
}

Flexcomm Interface 3 clock source select for Fractional Rate Divider.

Value on reset: 7

Variants

ENUM_0X0

0: Main clock.

ENUM_0X1

1: system PLL divided clock.

ENUM_0X2

2: FRO 12 MHz clock.

ENUM_0X3

3: FRO 96 MHz clock.

ENUM_0X4

4: FRO 1MHz clock.

ENUM_0X5

5: MCLK clock.

ENUM_0X6

6: Oscillator 32 kHz clock.

ENUM_0X7

7: No clock.

Trait Implementations

impl Clone for SEL_A

fn clone(&self) -> SEL_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for SEL_A

impl Debug for SEL_A

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl From<SEL_A> for u8

fn from(variant: SEL_A) -> Self

Performs the conversion.

impl PartialEq<SEL_A> for SEL_A

fn eq(&self, other: &SEL_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for SEL_A