[][src]Type Definition lpc55s6x_pac::pmc::aoreg1::R

type R = R<u32, AOREG1>;

Reader of register AOREG1

Methods

impl R[src]

pub fn por(&self) -> POR_R[src]

Bit 4 - The last chip reset was caused by a Power On Reset.

pub fn padreset(&self) -> PADRESET_R[src]

Bit 5 - The last chip reset was caused by a Pin Reset.

pub fn bodreset(&self) -> BODRESET_R[src]

Bit 6 - The last chip reset was caused by a Brown Out Detector (BoD), either VBAT BoD or Core Logic BoD.

pub fn systemreset(&self) -> SYSTEMRESET_R[src]

Bit 7 - The last chip reset was caused by a System Reset requested by the ARM CPU.

pub fn wdtreset(&self) -> WDTRESET_R[src]

Bit 8 - The last chip reset was caused by the Watchdog Timer.

pub fn swrreset(&self) -> SWRRESET_R[src]

Bit 9 - The last chip reset was caused by a Software event.

pub fn dpdreset_wakeupio(&self) -> DPDRESET_WAKEUPIO_R[src]

Bit 10 - The last chip reset was caused by a Wake-up I/O reset event during a Deep Power-Down mode.

pub fn dpdreset_rtc(&self) -> DPDRESET_RTC_R[src]

Bit 11 - The last chip reset was caused by an RTC (either RTC Alarm or RTC wake up) reset event during a Deep Power-Down mode.

pub fn dpdreset_ostimer(&self) -> DPDRESET_OSTIMER_R[src]

Bit 12 - The last chip reset was caused by an OS Event Timer reset event during a Deep Power-Down mode.

pub fn booterrorcounter(&self) -> BOOTERRORCOUNTER_R[src]

Bits 16:19 - ROM Boot Fatal Error Counter.