[][src]Type Definition lpc55s6x_pac::ahb_secure_ctrl::sec_ctrl_ahb_port10_slave0_rule::R

type R = R<u32, SEC_CTRL_AHB_PORT10_SLAVE0_RULE>;

Reader of register SEC_CTRL_AHB_PORT10_SLAVE0_RULE

Methods

impl R[src]

pub fn adc_rule(&self) -> ADC_RULE_R[src]

Bits 0:1 - ADC

pub fn usb_fs_host_rule(&self) -> USB_FS_HOST_RULE_R[src]

Bits 8:9 - USB Full Speed Host registers.

pub fn usb_hs_host_rule(&self) -> USB_HS_HOST_RULE_R[src]

Bits 12:13 - USB High speed host registers

pub fn hash_rule(&self) -> HASH_RULE_R[src]

Bits 16:17 - SHA-2 crypto registers

pub fn casper_rule(&self) -> CASPER_RULE_R[src]

Bits 20:21 - RSA/ECC crypto accelerator

pub fn pq_rule(&self) -> PQ_RULE_R[src]

Bits 24:25 - Power Quad (CPU0 processor hardware accelerator)

pub fn dma1_rule(&self) -> DMA1_RULE_R[src]

Bits 28:29 - DMA Controller (Secure)