lpc55s6x_pac/ahb_secure_ctrl/
sec_ctrl_ram0_slave_rule.rs

1#[doc = "Reader of register SEC_CTRL_RAM0_SLAVE_RULE"]
2pub type R = crate::R<u32, super::SEC_CTRL_RAM0_SLAVE_RULE>;
3#[doc = "Writer for register SEC_CTRL_RAM0_SLAVE_RULE"]
4pub type W = crate::W<u32, super::SEC_CTRL_RAM0_SLAVE_RULE>;
5#[doc = "Register SEC_CTRL_RAM0_SLAVE_RULE `reset()`'s with value 0"]
6impl crate::ResetValue for super::SEC_CTRL_RAM0_SLAVE_RULE {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Security access rules for the whole RAM0 : 0x2000_0000 - 0x2000_FFFF\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum RAM0_RULE_A {
17    #[doc = "0: Non-secure and Non-priviledge user access allowed."]
18    ENUM_NS_NP = 0,
19    #[doc = "1: Non-secure and Privilege access allowed."]
20    ENUM_NS_P = 1,
21    #[doc = "2: Secure and Non-priviledge user access allowed."]
22    ENUM_S_NP = 2,
23    #[doc = "3: Secure and Priviledge user access allowed."]
24    ENUM_S_P = 3,
25}
26impl From<RAM0_RULE_A> for u8 {
27    #[inline(always)]
28    fn from(variant: RAM0_RULE_A) -> Self {
29        variant as _
30    }
31}
32#[doc = "Reader of field `RAM0_RULE`"]
33pub type RAM0_RULE_R = crate::R<u8, RAM0_RULE_A>;
34impl RAM0_RULE_R {
35    #[doc = r"Get enumerated values variant"]
36    #[inline(always)]
37    pub fn variant(&self) -> RAM0_RULE_A {
38        match self.bits {
39            0 => RAM0_RULE_A::ENUM_NS_NP,
40            1 => RAM0_RULE_A::ENUM_NS_P,
41            2 => RAM0_RULE_A::ENUM_S_NP,
42            3 => RAM0_RULE_A::ENUM_S_P,
43            _ => unreachable!(),
44        }
45    }
46    #[doc = "Checks if the value of the field is `ENUM_NS_NP`"]
47    #[inline(always)]
48    pub fn is_enum_ns_np(&self) -> bool {
49        *self == RAM0_RULE_A::ENUM_NS_NP
50    }
51    #[doc = "Checks if the value of the field is `ENUM_NS_P`"]
52    #[inline(always)]
53    pub fn is_enum_ns_p(&self) -> bool {
54        *self == RAM0_RULE_A::ENUM_NS_P
55    }
56    #[doc = "Checks if the value of the field is `ENUM_S_NP`"]
57    #[inline(always)]
58    pub fn is_enum_s_np(&self) -> bool {
59        *self == RAM0_RULE_A::ENUM_S_NP
60    }
61    #[doc = "Checks if the value of the field is `ENUM_S_P`"]
62    #[inline(always)]
63    pub fn is_enum_s_p(&self) -> bool {
64        *self == RAM0_RULE_A::ENUM_S_P
65    }
66}
67#[doc = "Write proxy for field `RAM0_RULE`"]
68pub struct RAM0_RULE_W<'a> {
69    w: &'a mut W,
70}
71impl<'a> RAM0_RULE_W<'a> {
72    #[doc = r"Writes `variant` to the field"]
73    #[inline(always)]
74    pub fn variant(self, variant: RAM0_RULE_A) -> &'a mut W {
75        {
76            self.bits(variant.into())
77        }
78    }
79    #[doc = "Non-secure and Non-priviledge user access allowed."]
80    #[inline(always)]
81    pub fn enum_ns_np(self) -> &'a mut W {
82        self.variant(RAM0_RULE_A::ENUM_NS_NP)
83    }
84    #[doc = "Non-secure and Privilege access allowed."]
85    #[inline(always)]
86    pub fn enum_ns_p(self) -> &'a mut W {
87        self.variant(RAM0_RULE_A::ENUM_NS_P)
88    }
89    #[doc = "Secure and Non-priviledge user access allowed."]
90    #[inline(always)]
91    pub fn enum_s_np(self) -> &'a mut W {
92        self.variant(RAM0_RULE_A::ENUM_S_NP)
93    }
94    #[doc = "Secure and Priviledge user access allowed."]
95    #[inline(always)]
96    pub fn enum_s_p(self) -> &'a mut W {
97        self.variant(RAM0_RULE_A::ENUM_S_P)
98    }
99    #[doc = r"Writes raw bits to the field"]
100    #[inline(always)]
101    pub fn bits(self, value: u8) -> &'a mut W {
102        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
103        self.w
104    }
105}
106impl R {
107    #[doc = "Bits 0:1 - Security access rules for the whole RAM0 : 0x2000_0000 - 0x2000_FFFF"]
108    #[inline(always)]
109    pub fn ram0_rule(&self) -> RAM0_RULE_R {
110        RAM0_RULE_R::new((self.bits & 0x03) as u8)
111    }
112}
113impl W {
114    #[doc = "Bits 0:1 - Security access rules for the whole RAM0 : 0x2000_0000 - 0x2000_FFFF"]
115    #[inline(always)]
116    pub fn ram0_rule(&mut self) -> RAM0_RULE_W {
117        RAM0_RULE_W { w: self }
118    }
119}
lpc55s6x_pac/ahb_secure_ctrl/sec_ctrl_ram0_slave_rule.rs

lpc55s6x_pac/ahb_secure_ctrl/
sec_ctrl_ram0_slave_rule.rs
