[−][src]Type Definition lpc55s6x_pac::usbphy::ctrl::W
type W = W<u32, CTRL>;
Writer for register CTRL
Methods
impl W
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pub fn enhostdiscondetect(&mut self) -> ENHOSTDISCONDETECT_W
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Bit 1 - For host mode, enables high-speed disconnect detector
pub fn hostdiscondetect_irq(&mut self) -> HOSTDISCONDETECT_IRQ_W
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Bit 3 - Indicates that the device has disconnected in High-Speed mode
pub fn endevplugindet(&mut self) -> ENDEVPLUGINDET_W
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Bit 4 - Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode
pub fn devplugin_irq(&mut self) -> DEVPLUGIN_IRQ_W
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Bit 12 - Indicates that the device is connected
pub fn data_on_lradc(&mut self) -> DATA_ON_LRADC_W
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Bit 13 - Data on LR ADC: Enables the LRADC to monitor USB_DP and USB_DM
pub fn enutmilevel2(&mut self) -> ENUTMILEVEL2_W
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Bit 14 - Enables UTMI+ Level 2 operation for the USB HS PHY
pub fn enutmilevel3(&mut self) -> ENUTMILEVEL3_W
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Bit 15 - Enables UTMI+ Level 3 operation for the USB HS PHY
pub fn autoresume_en(&mut self) -> AUTORESUME_EN_W
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Bit 18 - Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)
pub fn enautoclr_clkgate(&mut self) -> ENAUTOCLR_CLKGATE_W
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Bit 19 - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended
pub fn enautoclr_phy_pwd(&mut self) -> ENAUTOCLR_PHY_PWD_W
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Bit 20 - Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended
pub fn fsdll_rst_en(&mut self) -> FSDLL_RST_EN_W
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Bit 24 - Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet.
pub fn otg_id_value(&mut self) -> OTG_ID_VALUE_W
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Bit 27 - Indicates the results of USB_ID pin while monitoring the cable plugged into the Micro- or Mini-AB receptacle
pub fn host_force_ls_se0(&mut self) -> HOST_FORCE_LS_SE0_W
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Bit 28 - Forces the next FS packet that is transmitted to have a EOP with low-speed timing
pub fn utmi_suspendm(&mut self) -> UTMI_SUSPENDM_W
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Bit 29 - Used by the PHY to indicate a powered-down state
pub fn clkgate(&mut self) -> CLKGATE_W
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Bit 30 - Gate UTMI Clocks
pub fn sftrst(&mut self) -> SFTRST_W
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Bit 31 - Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers