[][src]Type Definition lpc55s6x_pac::anactrl::xo32m_ctrl::R

type R = R<u32, XO32M_CTRL>;

Reader of register XO32M_CTRL

Methods

impl R[src]

pub fn gm(&self) -> GM_R[src]

Bits 1:3 - Gm value for Xo.

pub fn slave(&self) -> SLAVE_R[src]

Bit 4 - Xo in slave mode.

pub fn amp(&self) -> AMP_R[src]

Bits 5:7 - Amplitude selection , Min amp : 001, Max amp : 110.

pub fn osc_cap_in(&self) -> OSC_CAP_IN_R[src]

Bits 8:14 - Tune capa banks of Crystal 32-MHz input pin

pub fn osc_cap_out(&self) -> OSC_CAP_OUT_R[src]

Bits 15:21 - Tune capa banks of Crystal 32-MHz output pin

pub fn acbuf_pass_enable(&self) -> ACBUF_PASS_ENABLE_R[src]

Bit 22 - Bypass enable of XO AC buffer enable in pll and top level.

pub fn enable_pll_usb_out(&self) -> ENABLE_PLL_USB_OUT_R[src]

Bit 23 - Enable XO 32 MHz output to USB HS PLL.

pub fn enable_system_clk_out(&self) -> ENABLE_SYSTEM_CLK_OUT_R[src]

Bit 24 - Enable XO 32 MHz output to CPU system.

pub fn capteststartsrcsel(&self) -> CAPTESTSTARTSRCSEL_R[src]

Bit 25 - Source selection for 'xo32k_captest_start' signal.

pub fn capteststart(&self) -> CAPTESTSTART_R[src]

Bit 26 - 1: Start CapTest.

pub fn captestenable(&self) -> CAPTESTENABLE_R[src]

Bit 27 - Enable signal for captest.

pub fn captestoscinsel(&self) -> CAPTESTOSCINSEL_R[src]

Bit 28 - Select the input for test.