1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476
#[doc = "Reader of register FIFOWR"] pub type R = crate::R<u32, super::FIFOWR>; #[doc = "Writer for register FIFOWR"] pub type W = crate::W<u32, super::FIFOWR>; #[doc = "Register FIFOWR `reset()`'s with value 0"] impl crate::ResetValue for super::FIFOWR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Write proxy for field `TXDATA`"] pub struct TXDATA_W<'a> { w: &'a mut W, } impl<'a> TXDATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); self.w } } #[doc = "Possible values of the field `TXSSEL0_N`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TXSSEL0_N_AW { #[doc = "SSEL0 asserted."] ASSERTED, #[doc = "SSEL0 not asserted."] NOT_ASSERTED, } impl From<TXSSEL0_N_AW> for bool { #[inline(always)] fn from(variant: TXSSEL0_N_AW) -> Self { match variant { TXSSEL0_N_AW::ASSERTED => false, TXSSEL0_N_AW::NOT_ASSERTED => true, } } } #[doc = "Write proxy for field `TXSSEL0_N`"] pub struct TXSSEL0_N_W<'a> { w: &'a mut W, } impl<'a> TXSSEL0_N_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TXSSEL0_N_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "SSEL0 asserted."] #[inline(always)] pub fn asserted(self) -> &'a mut W { self.variant(TXSSEL0_N_AW::ASSERTED) } #[doc = "SSEL0 not asserted."] #[inline(always)] pub fn not_asserted(self) -> &'a mut W { self.variant(TXSSEL0_N_AW::NOT_ASSERTED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Possible values of the field `TXSSEL1_N`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TXSSEL1_N_AW { #[doc = "SSEL1 asserted."] ASSERTED, #[doc = "SSEL1 not asserted."] NOT_ASSERTED, } impl From<TXSSEL1_N_AW> for bool { #[inline(always)] fn from(variant: TXSSEL1_N_AW) -> Self { match variant { TXSSEL1_N_AW::ASSERTED => false, TXSSEL1_N_AW::NOT_ASSERTED => true, } } } #[doc = "Write proxy for field `TXSSEL1_N`"] pub struct TXSSEL1_N_W<'a> { w: &'a mut W, } impl<'a> TXSSEL1_N_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TXSSEL1_N_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "SSEL1 asserted."] #[inline(always)] pub fn asserted(self) -> &'a mut W { self.variant(TXSSEL1_N_AW::ASSERTED) } #[doc = "SSEL1 not asserted."] #[inline(always)] pub fn not_asserted(self) -> &'a mut W { self.variant(TXSSEL1_N_AW::NOT_ASSERTED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Possible values of the field `TXSSEL2_N`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TXSSEL2_N_AW { #[doc = "SSEL2 asserted."] ASSERTED, #[doc = "SSEL2 not asserted."] NOT_ASSERTED, } impl From<TXSSEL2_N_AW> for bool { #[inline(always)] fn from(variant: TXSSEL2_N_AW) -> Self { match variant { TXSSEL2_N_AW::ASSERTED => false, TXSSEL2_N_AW::NOT_ASSERTED => true, } } } #[doc = "Write proxy for field `TXSSEL2_N`"] pub struct TXSSEL2_N_W<'a> { w: &'a mut W, } impl<'a> TXSSEL2_N_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TXSSEL2_N_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "SSEL2 asserted."] #[inline(always)] pub fn asserted(self) -> &'a mut W { self.variant(TXSSEL2_N_AW::ASSERTED) } #[doc = "SSEL2 not asserted."] #[inline(always)] pub fn not_asserted(self) -> &'a mut W { self.variant(TXSSEL2_N_AW::NOT_ASSERTED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Possible values of the field `TXSSEL3_N`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TXSSEL3_N_AW { #[doc = "SSEL3 asserted."] ASSERTED, #[doc = "SSEL3 not asserted."] NOT_ASSERTED, } impl From<TXSSEL3_N_AW> for bool { #[inline(always)] fn from(variant: TXSSEL3_N_AW) -> Self { match variant { TXSSEL3_N_AW::ASSERTED => false, TXSSEL3_N_AW::NOT_ASSERTED => true, } } } #[doc = "Write proxy for field `TXSSEL3_N`"] pub struct TXSSEL3_N_W<'a> { w: &'a mut W, } impl<'a> TXSSEL3_N_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TXSSEL3_N_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "SSEL3 asserted."] #[inline(always)] pub fn asserted(self) -> &'a mut W { self.variant(TXSSEL3_N_AW::ASSERTED) } #[doc = "SSEL3 not asserted."] #[inline(always)] pub fn not_asserted(self) -> &'a mut W { self.variant(TXSSEL3_N_AW::NOT_ASSERTED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Possible values of the field `EOT`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum EOT_AW { #[doc = "SSEL not deasserted. This piece of data is not treated as the end of a transfer. SSEL will not be deasserted at the end of this data."] NOT_DEASSERTED, #[doc = "SSEL deasserted. This piece of data is treated as the end of a transfer. SSEL will be deasserted at the end of this piece of data."] DEASSERTED, } impl From<EOT_AW> for bool { #[inline(always)] fn from(variant: EOT_AW) -> Self { match variant { EOT_AW::NOT_DEASSERTED => false, EOT_AW::DEASSERTED => true, } } } #[doc = "Write proxy for field `EOT`"] pub struct EOT_W<'a> { w: &'a mut W, } impl<'a> EOT_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: EOT_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "SSEL not deasserted. This piece of data is not treated as the end of a transfer. SSEL will not be deasserted at the end of this data."] #[inline(always)] pub fn not_deasserted(self) -> &'a mut W { self.variant(EOT_AW::NOT_DEASSERTED) } #[doc = "SSEL deasserted. This piece of data is treated as the end of a transfer. SSEL will be deasserted at the end of this piece of data."] #[inline(always)] pub fn deasserted(self) -> &'a mut W { self.variant(EOT_AW::DEASSERTED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Possible values of the field `EOF`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum EOF_AW { #[doc = "Data not EOF. This piece of data transmitted is not treated as the end of a frame."] NOT_EOF, #[doc = "Data EOF. This piece of data is treated as the end of a frame, causing the Frame_delay time to be inserted before subsequent data is transmitted."] EOF, } impl From<EOF_AW> for bool { #[inline(always)] fn from(variant: EOF_AW) -> Self { match variant { EOF_AW::NOT_EOF => false, EOF_AW::EOF => true, } } } #[doc = "Write proxy for field `EOF`"] pub struct EOF_W<'a> { w: &'a mut W, } impl<'a> EOF_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: EOF_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Data not EOF. This piece of data transmitted is not treated as the end of a frame."] #[inline(always)] pub fn not_eof(self) -> &'a mut W { self.variant(EOF_AW::NOT_EOF) } #[doc = "Data EOF. This piece of data is treated as the end of a frame, causing the Frame_delay time to be inserted before subsequent data is transmitted."] #[inline(always)] pub fn eof(self) -> &'a mut W { self.variant(EOF_AW::EOF) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } #[doc = "Possible values of the field `RXIGNORE`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum RXIGNORE_AW { #[doc = "Read received data. Received data must be read in order to allow transmission to progress. SPI transmit will halt when the receive data FIFO is full. In slave mode, an overrun error will occur if received data is not read before new data is received."] READ, #[doc = "Ignore received data. Received data is ignored, allowing transmission without reading unneeded received data. No receiver flags are generated."] IGNORE, } impl From<RXIGNORE_AW> for bool { #[inline(always)] fn from(variant: RXIGNORE_AW) -> Self { match variant { RXIGNORE_AW::READ => false, RXIGNORE_AW::IGNORE => true, } } } #[doc = "Write proxy for field `RXIGNORE`"] pub struct RXIGNORE_W<'a> { w: &'a mut W, } impl<'a> RXIGNORE_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: RXIGNORE_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Read received data. Received data must be read in order to allow transmission to progress. SPI transmit will halt when the receive data FIFO is full. In slave mode, an overrun error will occur if received data is not read before new data is received."] #[inline(always)] pub fn read(self) -> &'a mut W { self.variant(RXIGNORE_AW::READ) } #[doc = "Ignore received data. Received data is ignored, allowing transmission without reading unneeded received data. No receiver flags are generated."] #[inline(always)] pub fn ignore(self) -> &'a mut W { self.variant(RXIGNORE_AW::IGNORE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); self.w } } #[doc = "Write proxy for field `LEN`"] pub struct LEN_W<'a> { w: &'a mut W, } impl<'a> LEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24); self.w } } impl R {} impl W { #[doc = "Bits 0:15 - Transmit data to the FIFO."] #[inline(always)] pub fn txdata(&mut self) -> TXDATA_W { TXDATA_W { w: self } } #[doc = "Bit 16 - Transmit slave select. This field asserts SSEL0 in master mode. The output on the pin is active LOW by default."] #[inline(always)] pub fn txssel0_n(&mut self) -> TXSSEL0_N_W { TXSSEL0_N_W { w: self } } #[doc = "Bit 17 - Transmit slave select. This field asserts SSEL1 in master mode. The output on the pin is active LOW by default."] #[inline(always)] pub fn txssel1_n(&mut self) -> TXSSEL1_N_W { TXSSEL1_N_W { w: self } } #[doc = "Bit 18 - Transmit slave select. This field asserts SSEL2 in master mode. The output on the pin is active LOW by default."] #[inline(always)] pub fn txssel2_n(&mut self) -> TXSSEL2_N_W { TXSSEL2_N_W { w: self } } #[doc = "Bit 19 - Transmit slave select. This field asserts SSEL3 in master mode. The output on the pin is active LOW by default."] #[inline(always)] pub fn txssel3_n(&mut self) -> TXSSEL3_N_W { TXSSEL3_N_W { w: self } } #[doc = "Bit 20 - End of transfer. The asserted SSEL will be deasserted at the end of a transfer and remain so far at least the time specified by the Transfer_delay value in the DLY register."] #[inline(always)] pub fn eot(&mut self) -> EOT_W { EOT_W { w: self } } #[doc = "Bit 21 - End of frame. Between frames, a delay may be inserted, as defined by the Frame_delay value in the DLY register. The end of a frame may not be particularly meaningful if the Frame_delay value = 0. This control can be used as part of the support for frame lengths greater than 16 bits."] #[inline(always)] pub fn eof(&mut self) -> EOF_W { EOF_W { w: self } } #[doc = "Bit 22 - Receive Ignore. This allows data to be transmitted using the SPI without the need to read unneeded data from the receiver. Setting this bit simplifies the transmit process and can be used with the DMA."] #[inline(always)] pub fn rxignore(&mut self) -> RXIGNORE_W { RXIGNORE_W { w: self } } #[doc = "Bits 24:27 - Data Length. Specifies the data length from 4 to 16 bits. Note that transfer lengths greater than 16 bits are supported by implementing multiple sequential transmits. 0x0-2 = Reserved. 0x3 = Data transfer is 4 bits in length. 0x4 = Data transfer is 5 bits in length. 0xF = Data transfer is 16 bits in length."] #[inline(always)] pub fn len(&mut self) -> LEN_W { LEN_W { w: self } } }