[−][src]Type Definition lpc55s6x_pac::syscon::SYSTICKCLKDIV0
type SYSTICKCLKDIV0 = Reg<u32, _SYSTICKCLKDIV0>;
System Tick Timer divider for CPU0
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about avaliable fields see systickclkdiv0 module
Trait Implementations
impl Readable for SYSTICKCLKDIV0
[src]
read()
method returns systickclkdiv0::R reader structure
impl Writable for SYSTICKCLKDIV0
[src]
write(|w| ..)
method takes systickclkdiv0::W writer structure
impl ResetValue for SYSTICKCLKDIV0
[src]
Register SYSTICKCLKDIV0 reset()
's with value 0x4000_0000