use core::ops::Deref;
use crate::{
raw,
};
use super::{
PinId,
PinType,
};
pub trait I2c: Deref<Target = raw::i2c0::RegisterBlock> {}
pub trait I2s {}
pub trait Spi: Deref<Target = raw::spi0::RegisterBlock> {}
pub trait Usart: Deref<Target = raw::usart0::RegisterBlock> {}
pub trait I2cSclPin<PIO, I2C> where PIO: PinId, I2C: I2c {}
pub trait I2cSdaPin<PIO, I2C> where PIO: PinId, I2C: I2c {}
pub trait I2sSckPin<PIO, I2S> where PIO: PinId, I2S: I2s {}
pub trait I2sWsPin<PIO, I2S> where PIO: PinId, I2S: I2s {}
pub trait I2sSdaPin<PIO, I2S> where PIO: PinId, I2S: I2s {}
pub trait I2sMclkPin<PIO, I2S> where PIO: PinId, I2S: I2s {}
pub enum ChipSelect {
Chip0,
Chip1,
Chip2,
Chip3,
AllChips,
}
pub trait SpiSckPin<PIO, SPI> where PIO: PinId, SPI: Spi {}
pub trait SpiMosiPin<PIO, SPI> where PIO: PinId, SPI: Spi {}
pub trait SpiMisoPin<PIO, SPI> where PIO: PinId, SPI: Spi {}
pub trait SpiCsPin<PIO, SPI> where PIO: PinId, SPI: Spi { const CS: ChipSelect; }
pub struct NoMosi;
impl<SPI: Spi> SpiMosiPin<NoPio, SPI> for NoMosi {}
pub struct NoMiso;
impl<SPI: Spi> SpiMisoPin<NoPio, SPI> for NoMiso {}
pub struct NoCs;
impl<SPI: Spi> SpiCsPin<NoPio, SPI> for NoCs { const CS: ChipSelect = ChipSelect::AllChips; }
pub trait UsartTxPin<PIO, USART> where PIO: PinId, USART: Usart {}
pub trait UsartRxPin<PIO, USART> where PIO: PinId, USART: Usart {}
pub trait UsartRtsPin<PIO, USART> where PIO: PinId, USART: Usart {}
pub trait UsartCtsPin<PIO, USART> where PIO: PinId, USART: Usart {}
pub trait UsartSclkPin<PIO, USART> where PIO: PinId, USART: Usart {}
pub struct NoPio;
impl PinId for NoPio {
const PORT: usize = !0;
const NUMBER: u8 = !0;
const MASK: u32 = !0;
const TYPE: PinType = PinType::D;
}
pub struct NoTx;
pub struct NoRx;
impl<USART: Usart> UsartTxPin<NoPio, USART> for NoTx {}
impl<USART: Usart> UsartRxPin<NoPio, USART> for NoRx {}
pub trait I2cPins<PIO1: PinId, PIO2: PinId, I2C: I2c> {}
impl<PIO1, PIO2, I2C, SCL, SDA> I2cPins<PIO1, PIO2, I2C> for (SCL, SDA)
where
PIO1: PinId,
PIO2: PinId,
I2C: I2c,
SCL: I2cSclPin<PIO1, I2C>,
SDA: I2cSdaPin<PIO2, I2C>,
{}
pub trait SpiPins<PIO1: PinId, PIO2: PinId, PIO3: PinId, PIO4: PinId, SPI: Spi> {
const CS: ChipSelect;
}
impl<PIO1, PIO2, PIO3, PIO4, SPI, SCK, MISO, MOSI, CS>
SpiPins<PIO1, PIO2, PIO3, PIO4, SPI>
for (SCK, MOSI, MISO, CS) where
PIO1: PinId,
PIO2: PinId,
PIO3: PinId,
PIO4: PinId,
SPI: Spi,
SCK: SpiSckPin<PIO1, SPI>,
MOSI: SpiMosiPin<PIO3, SPI>,
MISO: SpiMisoPin<PIO2, SPI>,
CS: SpiCsPin<PIO4, SPI>,
{
const CS: ChipSelect = CS::CS;
}
pub trait UsartPins<PIO1: PinId, PIO2: PinId, USART: Usart> {}
impl<PIO1, PIO2, USART, TX, RX> UsartPins<PIO1, PIO2, USART> for (TX, RX)
where
PIO1: PinId,
PIO2: PinId,
USART: Usart,
TX: UsartTxPin<PIO1, USART>,
RX: UsartRxPin<PIO2, USART>,
{}