lpc55s6x_hal/peripherals/
utick.rs1use embedded_hal::timer;
14use nb;
15use void::Void;
16
17use crate::{
18 raw,
19 peripherals::{
20 syscon,
21 },
22 typestates::{
23 init_state,
24 ClocksSupportUtickToken,
25 },
26};
27
28crate::wrap_stateful_peripheral!(Utick, UTICK0);
29
30pub type EnabledUtick = Utick<init_state::Enabled>;
31
32impl<State> Utick<State> {
33 pub fn enabled(
34 mut self,
35 syscon: &mut syscon::Syscon,
36 _clocktree_token: &ClocksSupportUtickToken,
37 ) -> EnabledUtick {
38 syscon.enable_clock(&mut self.raw);
39 syscon.reset(&mut self.raw);
40
41 Utick {
42 raw: self.raw,
43 _state: init_state::Enabled(()),
44 }
45 }
46
47 pub fn disabled(mut self, syscon: &mut syscon::Syscon) -> Utick<init_state::Disabled> {
48 syscon.disable_clock(&mut self.raw);
49
50 Utick {
51 raw: self.raw,
52 _state: init_state::Disabled,
53 }
54 }
55}
56
57impl timer::Cancel for EnabledUtick {
60 type Error = Void;
61
62 fn cancel(&mut self) -> Result<(), Self::Error> {
63 self.raw.ctrl.write(|w| unsafe { w.delayval().bits(0) });
65 Ok(())
66 }
67}
68
69impl timer::CountDown for EnabledUtick {
71 type Time = u32;
72
73 fn start<T>(&mut self, timeout: T)
74 where
75 T: Into<Self::Time>,
76 {
77 let time = timeout.into();
80 assert!(time >= 2);
83 self.raw
84 .ctrl
85 .write(|w| unsafe { w.delayval().bits(time - 1) });
86 while self.raw.stat.read().active().bit_is_clear() {}
92 }
93
94 fn wait(&mut self) -> nb::Result<(), Void> {
95 if self.raw.stat.read().active().bit_is_clear() {
96 return Ok(());
97 }
98
99 Err(nb::Error::WouldBlock)
100 }
101}
102
103impl EnabledUtick {
105 pub fn blocking_wait(&mut self) {
106 while self.raw.stat.read().active().bit_is_set() {}
107 }
108}