lpc550x/ahb_secure_ctrl/
sec_ctrl_apb_bridge1_mem_ctrl0.rs

1#[doc = "Register `SEC_CTRL_APB_BRIDGE1_MEM_CTRL0` reader"]
2pub struct R(crate::R<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SEC_CTRL_APB_BRIDGE1_MEM_CTRL0` writer"]
17pub struct W(crate::W<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PMC_RULE` reader - Power Management Controller."]
38pub type PMC_RULE_R = crate::FieldReader<u8, PMC_RULE_A>;
39#[doc = "Power Management Controller.\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum PMC_RULE_A {
43    #[doc = "0: Non-secure and Non-priviledge user access allowed."]
44    ENUM_NS_NP = 0,
45    #[doc = "1: Non-secure and Privilege access allowed."]
46    ENUM_NS_P = 1,
47    #[doc = "2: Secure and Non-priviledge user access allowed."]
48    ENUM_S_NP = 2,
49    #[doc = "3: Secure and Priviledge user access allowed."]
50    ENUM_S_P = 3,
51}
52impl From<PMC_RULE_A> for u8 {
53    #[inline(always)]
54    fn from(variant: PMC_RULE_A) -> Self {
55        variant as _
56    }
57}
58impl PMC_RULE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> PMC_RULE_A {
62        match self.bits {
63            0 => PMC_RULE_A::ENUM_NS_NP,
64            1 => PMC_RULE_A::ENUM_NS_P,
65            2 => PMC_RULE_A::ENUM_S_NP,
66            3 => PMC_RULE_A::ENUM_S_P,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `ENUM_NS_NP`"]
71    #[inline(always)]
72    pub fn is_enum_ns_np(&self) -> bool {
73        *self == PMC_RULE_A::ENUM_NS_NP
74    }
75    #[doc = "Checks if the value of the field is `ENUM_NS_P`"]
76    #[inline(always)]
77    pub fn is_enum_ns_p(&self) -> bool {
78        *self == PMC_RULE_A::ENUM_NS_P
79    }
80    #[doc = "Checks if the value of the field is `ENUM_S_NP`"]
81    #[inline(always)]
82    pub fn is_enum_s_np(&self) -> bool {
83        *self == PMC_RULE_A::ENUM_S_NP
84    }
85    #[doc = "Checks if the value of the field is `ENUM_S_P`"]
86    #[inline(always)]
87    pub fn is_enum_s_p(&self) -> bool {
88        *self == PMC_RULE_A::ENUM_S_P
89    }
90}
91#[doc = "Field `PMC_RULE` writer - Power Management Controller."]
92pub type PMC_RULE_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u32, SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC, u8, PMC_RULE_A, 2, O>;
94impl<'a, const O: u8> PMC_RULE_W<'a, O> {
95    #[doc = "Non-secure and Non-priviledge user access allowed."]
96    #[inline(always)]
97    pub fn enum_ns_np(self) -> &'a mut W {
98        self.variant(PMC_RULE_A::ENUM_NS_NP)
99    }
100    #[doc = "Non-secure and Privilege access allowed."]
101    #[inline(always)]
102    pub fn enum_ns_p(self) -> &'a mut W {
103        self.variant(PMC_RULE_A::ENUM_NS_P)
104    }
105    #[doc = "Secure and Non-priviledge user access allowed."]
106    #[inline(always)]
107    pub fn enum_s_np(self) -> &'a mut W {
108        self.variant(PMC_RULE_A::ENUM_S_NP)
109    }
110    #[doc = "Secure and Priviledge user access allowed."]
111    #[inline(always)]
112    pub fn enum_s_p(self) -> &'a mut W {
113        self.variant(PMC_RULE_A::ENUM_S_P)
114    }
115}
116#[doc = "Field `SYSCTRL_RULE` reader - System Controller."]
117pub type SYSCTRL_RULE_R = crate::FieldReader<u8, SYSCTRL_RULE_A>;
118#[doc = "System Controller.\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120#[repr(u8)]
121pub enum SYSCTRL_RULE_A {
122    #[doc = "0: Non-secure and Non-priviledge user access allowed."]
123    ENUM_NS_NP = 0,
124    #[doc = "1: Non-secure and Privilege access allowed."]
125    ENUM_NS_P = 1,
126    #[doc = "2: Secure and Non-priviledge user access allowed."]
127    ENUM_S_NP = 2,
128    #[doc = "3: Secure and Priviledge user access allowed."]
129    ENUM_S_P = 3,
130}
131impl From<SYSCTRL_RULE_A> for u8 {
132    #[inline(always)]
133    fn from(variant: SYSCTRL_RULE_A) -> Self {
134        variant as _
135    }
136}
137impl SYSCTRL_RULE_R {
138    #[doc = "Get enumerated values variant"]
139    #[inline(always)]
140    pub fn variant(&self) -> SYSCTRL_RULE_A {
141        match self.bits {
142            0 => SYSCTRL_RULE_A::ENUM_NS_NP,
143            1 => SYSCTRL_RULE_A::ENUM_NS_P,
144            2 => SYSCTRL_RULE_A::ENUM_S_NP,
145            3 => SYSCTRL_RULE_A::ENUM_S_P,
146            _ => unreachable!(),
147        }
148    }
149    #[doc = "Checks if the value of the field is `ENUM_NS_NP`"]
150    #[inline(always)]
151    pub fn is_enum_ns_np(&self) -> bool {
152        *self == SYSCTRL_RULE_A::ENUM_NS_NP
153    }
154    #[doc = "Checks if the value of the field is `ENUM_NS_P`"]
155    #[inline(always)]
156    pub fn is_enum_ns_p(&self) -> bool {
157        *self == SYSCTRL_RULE_A::ENUM_NS_P
158    }
159    #[doc = "Checks if the value of the field is `ENUM_S_NP`"]
160    #[inline(always)]
161    pub fn is_enum_s_np(&self) -> bool {
162        *self == SYSCTRL_RULE_A::ENUM_S_NP
163    }
164    #[doc = "Checks if the value of the field is `ENUM_S_P`"]
165    #[inline(always)]
166    pub fn is_enum_s_p(&self) -> bool {
167        *self == SYSCTRL_RULE_A::ENUM_S_P
168    }
169}
170#[doc = "Field `SYSCTRL_RULE` writer - System Controller."]
171pub type SYSCTRL_RULE_W<'a, const O: u8> =
172    crate::FieldWriterSafe<'a, u32, SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC, u8, SYSCTRL_RULE_A, 2, O>;
173impl<'a, const O: u8> SYSCTRL_RULE_W<'a, O> {
174    #[doc = "Non-secure and Non-priviledge user access allowed."]
175    #[inline(always)]
176    pub fn enum_ns_np(self) -> &'a mut W {
177        self.variant(SYSCTRL_RULE_A::ENUM_NS_NP)
178    }
179    #[doc = "Non-secure and Privilege access allowed."]
180    #[inline(always)]
181    pub fn enum_ns_p(self) -> &'a mut W {
182        self.variant(SYSCTRL_RULE_A::ENUM_NS_P)
183    }
184    #[doc = "Secure and Non-priviledge user access allowed."]
185    #[inline(always)]
186    pub fn enum_s_np(self) -> &'a mut W {
187        self.variant(SYSCTRL_RULE_A::ENUM_S_NP)
188    }
189    #[doc = "Secure and Priviledge user access allowed."]
190    #[inline(always)]
191    pub fn enum_s_p(self) -> &'a mut W {
192        self.variant(SYSCTRL_RULE_A::ENUM_S_P)
193    }
194}
195#[doc = "Field `SPI_FILTER_RULE` reader - SPI FILTER control."]
196pub type SPI_FILTER_RULE_R = crate::FieldReader<u8, SPI_FILTER_RULE_A>;
197#[doc = "SPI FILTER control.\n\nValue on reset: 0"]
198#[derive(Clone, Copy, Debug, PartialEq, Eq)]
199#[repr(u8)]
200pub enum SPI_FILTER_RULE_A {
201    #[doc = "0: Non-secure and Non-priviledge user access allowed."]
202    ENUM_NS_NP = 0,
203    #[doc = "1: Non-secure and Privilege access allowed."]
204    ENUM_NS_P = 1,
205    #[doc = "2: Secure and Non-priviledge user access allowed."]
206    ENUM_S_NP = 2,
207    #[doc = "3: Secure and Priviledge user access allowed."]
208    ENUM_S_P = 3,
209}
210impl From<SPI_FILTER_RULE_A> for u8 {
211    #[inline(always)]
212    fn from(variant: SPI_FILTER_RULE_A) -> Self {
213        variant as _
214    }
215}
216impl SPI_FILTER_RULE_R {
217    #[doc = "Get enumerated values variant"]
218    #[inline(always)]
219    pub fn variant(&self) -> SPI_FILTER_RULE_A {
220        match self.bits {
221            0 => SPI_FILTER_RULE_A::ENUM_NS_NP,
222            1 => SPI_FILTER_RULE_A::ENUM_NS_P,
223            2 => SPI_FILTER_RULE_A::ENUM_S_NP,
224            3 => SPI_FILTER_RULE_A::ENUM_S_P,
225            _ => unreachable!(),
226        }
227    }
228    #[doc = "Checks if the value of the field is `ENUM_NS_NP`"]
229    #[inline(always)]
230    pub fn is_enum_ns_np(&self) -> bool {
231        *self == SPI_FILTER_RULE_A::ENUM_NS_NP
232    }
233    #[doc = "Checks if the value of the field is `ENUM_NS_P`"]
234    #[inline(always)]
235    pub fn is_enum_ns_p(&self) -> bool {
236        *self == SPI_FILTER_RULE_A::ENUM_NS_P
237    }
238    #[doc = "Checks if the value of the field is `ENUM_S_NP`"]
239    #[inline(always)]
240    pub fn is_enum_s_np(&self) -> bool {
241        *self == SPI_FILTER_RULE_A::ENUM_S_NP
242    }
243    #[doc = "Checks if the value of the field is `ENUM_S_P`"]
244    #[inline(always)]
245    pub fn is_enum_s_p(&self) -> bool {
246        *self == SPI_FILTER_RULE_A::ENUM_S_P
247    }
248}
249#[doc = "Field `SPI_FILTER_RULE` writer - SPI FILTER control."]
250pub type SPI_FILTER_RULE_W<'a, const O: u8> = crate::FieldWriterSafe<
251    'a,
252    u32,
253    SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC,
254    u8,
255    SPI_FILTER_RULE_A,
256    2,
257    O,
258>;
259impl<'a, const O: u8> SPI_FILTER_RULE_W<'a, O> {
260    #[doc = "Non-secure and Non-priviledge user access allowed."]
261    #[inline(always)]
262    pub fn enum_ns_np(self) -> &'a mut W {
263        self.variant(SPI_FILTER_RULE_A::ENUM_NS_NP)
264    }
265    #[doc = "Non-secure and Privilege access allowed."]
266    #[inline(always)]
267    pub fn enum_ns_p(self) -> &'a mut W {
268        self.variant(SPI_FILTER_RULE_A::ENUM_NS_P)
269    }
270    #[doc = "Secure and Non-priviledge user access allowed."]
271    #[inline(always)]
272    pub fn enum_s_np(self) -> &'a mut W {
273        self.variant(SPI_FILTER_RULE_A::ENUM_S_NP)
274    }
275    #[doc = "Secure and Priviledge user access allowed."]
276    #[inline(always)]
277    pub fn enum_s_p(self) -> &'a mut W {
278        self.variant(SPI_FILTER_RULE_A::ENUM_S_P)
279    }
280}
281impl R {
282    #[doc = "Bits 0:1 - Power Management Controller."]
283    #[inline(always)]
284    pub fn pmc_rule(&self) -> PMC_RULE_R {
285        PMC_RULE_R::new((self.bits & 3) as u8)
286    }
287    #[doc = "Bits 12:13 - System Controller."]
288    #[inline(always)]
289    pub fn sysctrl_rule(&self) -> SYSCTRL_RULE_R {
290        SYSCTRL_RULE_R::new(((self.bits >> 12) & 3) as u8)
291    }
292    #[doc = "Bits 16:17 - SPI FILTER control."]
293    #[inline(always)]
294    pub fn spi_filter_rule(&self) -> SPI_FILTER_RULE_R {
295        SPI_FILTER_RULE_R::new(((self.bits >> 16) & 3) as u8)
296    }
297}
298impl W {
299    #[doc = "Bits 0:1 - Power Management Controller."]
300    #[inline(always)]
301    pub fn pmc_rule(&mut self) -> PMC_RULE_W<0> {
302        PMC_RULE_W::new(self)
303    }
304    #[doc = "Bits 12:13 - System Controller."]
305    #[inline(always)]
306    pub fn sysctrl_rule(&mut self) -> SYSCTRL_RULE_W<12> {
307        SYSCTRL_RULE_W::new(self)
308    }
309    #[doc = "Bits 16:17 - SPI FILTER control."]
310    #[inline(always)]
311    pub fn spi_filter_rule(&mut self) -> SPI_FILTER_RULE_W<16> {
312        SPI_FILTER_RULE_W::new(self)
313    }
314    #[doc = "Writes raw bits to the register."]
315    #[inline(always)]
316    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
317        self.0.bits(bits);
318        self
319    }
320}
321#[doc = "Security access rules for APB Bridge 1 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 1 sectors in total.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sec_ctrl_apb_bridge1_mem_ctrl0](index.html) module"]
322pub struct SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC;
323impl crate::RegisterSpec for SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC {
324    type Ux = u32;
325}
326#[doc = "`read()` method returns [sec_ctrl_apb_bridge1_mem_ctrl0::R](R) reader structure"]
327impl crate::Readable for SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC {
328    type Reader = R;
329}
330#[doc = "`write(|w| ..)` method takes [sec_ctrl_apb_bridge1_mem_ctrl0::W](W) writer structure"]
331impl crate::Writable for SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC {
332    type Writer = W;
333}
334#[doc = "`reset()` method sets SEC_CTRL_APB_BRIDGE1_MEM_CTRL0 to value 0"]
335impl crate::Resettable for SEC_CTRL_APB_BRIDGE1_MEM_CTRL0_SPEC {
336    #[inline(always)]
337    fn reset_value() -> Self::Ux {
338        0
339    }
340}
lpc550x/ahb_secure_ctrl/sec_ctrl_apb_bridge1_mem_ctrl0.rs

lpc550x/ahb_secure_ctrl/
sec_ctrl_apb_bridge1_mem_ctrl0.rs
