lpc550x/adc0/
cmdl9.rs

1#[doc = "Register `CMDL9` reader"]
2pub struct R(crate::R<CMDL9_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CMDL9_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CMDL9_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CMDL9_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CMDL9` writer"]
17pub struct W(crate::W<CMDL9_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CMDL9_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CMDL9_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CMDL9_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADCH` reader - Input channel select."]
38pub type ADCH_R = crate::FieldReader<u8, ADCH_A>;
39#[doc = "Input channel select.\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum ADCH_A {
43    #[doc = "0: Select CH0A/ADC0_0 or CH0B/ADC0_8."]
44    CHANNEL_0 = 0,
45    #[doc = "1: Select CH1A/ADC0_1 or CH1B/ADC0_9."]
46    CHANNEL_1 = 1,
47    #[doc = "2: Select CH2A/ADC0_2 or CH2B/ADC0_10."]
48    CHANNEL_2 = 2,
49    #[doc = "3: Select CH3A/ADC0_3 or CH3B/ADC0_11."]
50    CHANNEL_3 = 3,
51    #[doc = "4: Select CH4B/ADC0_12."]
52    CHANNEL_4 = 4,
53    #[doc = "12: Select VDDA."]
54    VDDA = 12,
55    #[doc = "13: Select internal ADC bandgap reference."]
56    BANDGAP = 13,
57    #[doc = "26: Select temperature sensor."]
58    TEMP_SENSOR = 26,
59}
60impl From<ADCH_A> for u8 {
61    #[inline(always)]
62    fn from(variant: ADCH_A) -> Self {
63        variant as _
64    }
65}
66impl ADCH_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> Option<ADCH_A> {
70        match self.bits {
71            0 => Some(ADCH_A::CHANNEL_0),
72            1 => Some(ADCH_A::CHANNEL_1),
73            2 => Some(ADCH_A::CHANNEL_2),
74            3 => Some(ADCH_A::CHANNEL_3),
75            4 => Some(ADCH_A::CHANNEL_4),
76            12 => Some(ADCH_A::VDDA),
77            13 => Some(ADCH_A::BANDGAP),
78            26 => Some(ADCH_A::TEMP_SENSOR),
79            _ => None,
80        }
81    }
82    #[doc = "Checks if the value of the field is `CHANNEL_0`"]
83    #[inline(always)]
84    pub fn is_channel_0(&self) -> bool {
85        *self == ADCH_A::CHANNEL_0
86    }
87    #[doc = "Checks if the value of the field is `CHANNEL_1`"]
88    #[inline(always)]
89    pub fn is_channel_1(&self) -> bool {
90        *self == ADCH_A::CHANNEL_1
91    }
92    #[doc = "Checks if the value of the field is `CHANNEL_2`"]
93    #[inline(always)]
94    pub fn is_channel_2(&self) -> bool {
95        *self == ADCH_A::CHANNEL_2
96    }
97    #[doc = "Checks if the value of the field is `CHANNEL_3`"]
98    #[inline(always)]
99    pub fn is_channel_3(&self) -> bool {
100        *self == ADCH_A::CHANNEL_3
101    }
102    #[doc = "Checks if the value of the field is `CHANNEL_4`"]
103    #[inline(always)]
104    pub fn is_channel_4(&self) -> bool {
105        *self == ADCH_A::CHANNEL_4
106    }
107    #[doc = "Checks if the value of the field is `VDDA`"]
108    #[inline(always)]
109    pub fn is_vdda(&self) -> bool {
110        *self == ADCH_A::VDDA
111    }
112    #[doc = "Checks if the value of the field is `BANDGAP`"]
113    #[inline(always)]
114    pub fn is_bandgap(&self) -> bool {
115        *self == ADCH_A::BANDGAP
116    }
117    #[doc = "Checks if the value of the field is `TEMP_SENSOR`"]
118    #[inline(always)]
119    pub fn is_temp_sensor(&self) -> bool {
120        *self == ADCH_A::TEMP_SENSOR
121    }
122}
123#[doc = "Field `ADCH` writer - Input channel select."]
124pub type ADCH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CMDL9_SPEC, u8, ADCH_A, 5, O>;
125impl<'a, const O: u8> ADCH_W<'a, O> {
126    #[doc = "Select CH0A/ADC0_0 or CH0B/ADC0_8."]
127    #[inline(always)]
128    pub fn channel_0(self) -> &'a mut W {
129        self.variant(ADCH_A::CHANNEL_0)
130    }
131    #[doc = "Select CH1A/ADC0_1 or CH1B/ADC0_9."]
132    #[inline(always)]
133    pub fn channel_1(self) -> &'a mut W {
134        self.variant(ADCH_A::CHANNEL_1)
135    }
136    #[doc = "Select CH2A/ADC0_2 or CH2B/ADC0_10."]
137    #[inline(always)]
138    pub fn channel_2(self) -> &'a mut W {
139        self.variant(ADCH_A::CHANNEL_2)
140    }
141    #[doc = "Select CH3A/ADC0_3 or CH3B/ADC0_11."]
142    #[inline(always)]
143    pub fn channel_3(self) -> &'a mut W {
144        self.variant(ADCH_A::CHANNEL_3)
145    }
146    #[doc = "Select CH4B/ADC0_12."]
147    #[inline(always)]
148    pub fn channel_4(self) -> &'a mut W {
149        self.variant(ADCH_A::CHANNEL_4)
150    }
151    #[doc = "Select VDDA."]
152    #[inline(always)]
153    pub fn vdda(self) -> &'a mut W {
154        self.variant(ADCH_A::VDDA)
155    }
156    #[doc = "Select internal ADC bandgap reference."]
157    #[inline(always)]
158    pub fn bandgap(self) -> &'a mut W {
159        self.variant(ADCH_A::BANDGAP)
160    }
161    #[doc = "Select temperature sensor."]
162    #[inline(always)]
163    pub fn temp_sensor(self) -> &'a mut W {
164        self.variant(ADCH_A::TEMP_SENSOR)
165    }
166}
167#[doc = "Field `CTYPE` reader - Conversion Type."]
168pub type CTYPE_R = crate::FieldReader<u8, CTYPE_A>;
169#[doc = "Conversion Type.\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq, Eq)]
171#[repr(u8)]
172pub enum CTYPE_A {
173    #[doc = "0: Single-Ended Mode. Only A side channel is converted."]
174    SINGLE_ENDED_A = 0,
175    #[doc = "1: Single-Ended Mode. Only B side channel is converted."]
176    SINGLE_ENDED_B = 1,
177    #[doc = "2: Differential Mode. A-B."]
178    DIFFERENTIAL = 2,
179    #[doc = "3: Dual-Single-Ended Mode. Both A side and B side channels are converted independently."]
180    DUAL_SINGLE_ENDED = 3,
181}
182impl From<CTYPE_A> for u8 {
183    #[inline(always)]
184    fn from(variant: CTYPE_A) -> Self {
185        variant as _
186    }
187}
188impl CTYPE_R {
189    #[doc = "Get enumerated values variant"]
190    #[inline(always)]
191    pub fn variant(&self) -> CTYPE_A {
192        match self.bits {
193            0 => CTYPE_A::SINGLE_ENDED_A,
194            1 => CTYPE_A::SINGLE_ENDED_B,
195            2 => CTYPE_A::DIFFERENTIAL,
196            3 => CTYPE_A::DUAL_SINGLE_ENDED,
197            _ => unreachable!(),
198        }
199    }
200    #[doc = "Checks if the value of the field is `SINGLE_ENDED_A`"]
201    #[inline(always)]
202    pub fn is_single_ended_a(&self) -> bool {
203        *self == CTYPE_A::SINGLE_ENDED_A
204    }
205    #[doc = "Checks if the value of the field is `SINGLE_ENDED_B`"]
206    #[inline(always)]
207    pub fn is_single_ended_b(&self) -> bool {
208        *self == CTYPE_A::SINGLE_ENDED_B
209    }
210    #[doc = "Checks if the value of the field is `DIFFERENTIAL`"]
211    #[inline(always)]
212    pub fn is_differential(&self) -> bool {
213        *self == CTYPE_A::DIFFERENTIAL
214    }
215    #[doc = "Checks if the value of the field is `DUAL_SINGLE_ENDED`"]
216    #[inline(always)]
217    pub fn is_dual_single_ended(&self) -> bool {
218        *self == CTYPE_A::DUAL_SINGLE_ENDED
219    }
220}
221#[doc = "Field `CTYPE` writer - Conversion Type."]
222pub type CTYPE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CMDL9_SPEC, u8, CTYPE_A, 2, O>;
223impl<'a, const O: u8> CTYPE_W<'a, O> {
224    #[doc = "Single-Ended Mode. Only A side channel is converted."]
225    #[inline(always)]
226    pub fn single_ended_a(self) -> &'a mut W {
227        self.variant(CTYPE_A::SINGLE_ENDED_A)
228    }
229    #[doc = "Single-Ended Mode. Only B side channel is converted."]
230    #[inline(always)]
231    pub fn single_ended_b(self) -> &'a mut W {
232        self.variant(CTYPE_A::SINGLE_ENDED_B)
233    }
234    #[doc = "Differential Mode. A-B."]
235    #[inline(always)]
236    pub fn differential(self) -> &'a mut W {
237        self.variant(CTYPE_A::DIFFERENTIAL)
238    }
239    #[doc = "Dual-Single-Ended Mode. Both A side and B side channels are converted independently."]
240    #[inline(always)]
241    pub fn dual_single_ended(self) -> &'a mut W {
242        self.variant(CTYPE_A::DUAL_SINGLE_ENDED)
243    }
244}
245#[doc = "Field `MODE` reader - Select resolution of conversions."]
246pub type MODE_R = crate::BitReader<MODE_A>;
247#[doc = "Select resolution of conversions.\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq, Eq)]
249pub enum MODE_A {
250    #[doc = "0: Standard resolution. Single-ended 12-bit conversion; Differential 13-bit conversion with 2's complement output."]
251    STANDARD_RESOLUTION = 0,
252    #[doc = "1: High resolution. Single-ended 16-bit conversion; Differential 16-bit conversion with 2's complement output."]
253    HIGH_RESOLUTION = 1,
254}
255impl From<MODE_A> for bool {
256    #[inline(always)]
257    fn from(variant: MODE_A) -> Self {
258        variant as u8 != 0
259    }
260}
261impl MODE_R {
262    #[doc = "Get enumerated values variant"]
263    #[inline(always)]
264    pub fn variant(&self) -> MODE_A {
265        match self.bits {
266            false => MODE_A::STANDARD_RESOLUTION,
267            true => MODE_A::HIGH_RESOLUTION,
268        }
269    }
270    #[doc = "Checks if the value of the field is `STANDARD_RESOLUTION`"]
271    #[inline(always)]
272    pub fn is_standard_resolution(&self) -> bool {
273        *self == MODE_A::STANDARD_RESOLUTION
274    }
275    #[doc = "Checks if the value of the field is `HIGH_RESOLUTION`"]
276    #[inline(always)]
277    pub fn is_high_resolution(&self) -> bool {
278        *self == MODE_A::HIGH_RESOLUTION
279    }
280}
281#[doc = "Field `MODE` writer - Select resolution of conversions."]
282pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMDL9_SPEC, MODE_A, O>;
283impl<'a, const O: u8> MODE_W<'a, O> {
284    #[doc = "Standard resolution. Single-ended 12-bit conversion; Differential 13-bit conversion with 2's complement output."]
285    #[inline(always)]
286    pub fn standard_resolution(self) -> &'a mut W {
287        self.variant(MODE_A::STANDARD_RESOLUTION)
288    }
289    #[doc = "High resolution. Single-ended 16-bit conversion; Differential 16-bit conversion with 2's complement output."]
290    #[inline(always)]
291    pub fn high_resolution(self) -> &'a mut W {
292        self.variant(MODE_A::HIGH_RESOLUTION)
293    }
294}
295impl R {
296    #[doc = "Bits 0:4 - Input channel select."]
297    #[inline(always)]
298    pub fn adch(&self) -> ADCH_R {
299        ADCH_R::new((self.bits & 0x1f) as u8)
300    }
301    #[doc = "Bits 5:6 - Conversion Type."]
302    #[inline(always)]
303    pub fn ctype(&self) -> CTYPE_R {
304        CTYPE_R::new(((self.bits >> 5) & 3) as u8)
305    }
306    #[doc = "Bit 7 - Select resolution of conversions."]
307    #[inline(always)]
308    pub fn mode(&self) -> MODE_R {
309        MODE_R::new(((self.bits >> 7) & 1) != 0)
310    }
311}
312impl W {
313    #[doc = "Bits 0:4 - Input channel select."]
314    #[inline(always)]
315    pub fn adch(&mut self) -> ADCH_W<0> {
316        ADCH_W::new(self)
317    }
318    #[doc = "Bits 5:6 - Conversion Type."]
319    #[inline(always)]
320    pub fn ctype(&mut self) -> CTYPE_W<5> {
321        CTYPE_W::new(self)
322    }
323    #[doc = "Bit 7 - Select resolution of conversions."]
324    #[inline(always)]
325    pub fn mode(&mut self) -> MODE_W<7> {
326        MODE_W::new(self)
327    }
328    #[doc = "Writes raw bits to the register."]
329    #[inline(always)]
330    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
331        self.0.bits(bits);
332        self
333    }
334}
335#[doc = "ADC Command Low Buffer Register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmdl9](index.html) module"]
336pub struct CMDL9_SPEC;
337impl crate::RegisterSpec for CMDL9_SPEC {
338    type Ux = u32;
339}
340#[doc = "`read()` method returns [cmdl9::R](R) reader structure"]
341impl crate::Readable for CMDL9_SPEC {
342    type Reader = R;
343}
344#[doc = "`write(|w| ..)` method takes [cmdl9::W](W) writer structure"]
345impl crate::Writable for CMDL9_SPEC {
346    type Writer = W;
347}
348#[doc = "`reset()` method sets CMDL9 to value 0"]
349impl crate::Resettable for CMDL9_SPEC {
350    #[inline(always)]
351    fn reset_value() -> Self::Ux {
352        0
353    }
354}
lpc550x/adc0/cmdl9.rs

lpc550x/adc0/
cmdl9.rs
