lpc55_pac/usbhsh/
atlptd.rs

1#[doc = "Register `ATLPTD` reader"]
2pub struct R(crate::R<ATLPTD_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ATLPTD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ATLPTD_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ATLPTD_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ATLPTD` writer"]
17pub struct W(crate::W<ATLPTD_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ATLPTD_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ATLPTD_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ATLPTD_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ATL_CUR` reader - This indicates the current PTD that is used by the hardware when it is processing the ATL list."]
38pub struct ATL_CUR_R(crate::FieldReader<u8, u8>);
39impl ATL_CUR_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        ATL_CUR_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for ATL_CUR_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `ATL_CUR` writer - This indicates the current PTD that is used by the hardware when it is processing the ATL list."]
53pub struct ATL_CUR_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> ATL_CUR_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !(0x1f << 4)) | ((value as u32 & 0x1f) << 4);
61        self.w
62    }
63}
64#[doc = "Field `ATL_BASE` reader - Base address to be used by the hardware to find the start of the ATL list."]
65pub struct ATL_BASE_R(crate::FieldReader<u32, u32>);
66impl ATL_BASE_R {
67    #[inline(always)]
68    pub(crate) fn new(bits: u32) -> Self {
69        ATL_BASE_R(crate::FieldReader::new(bits))
70    }
71}
72impl core::ops::Deref for ATL_BASE_R {
73    type Target = crate::FieldReader<u32, u32>;
74    #[inline(always)]
75    fn deref(&self) -> &Self::Target {
76        &self.0
77    }
78}
79#[doc = "Field `ATL_BASE` writer - Base address to be used by the hardware to find the start of the ATL list."]
80pub struct ATL_BASE_W<'a> {
81    w: &'a mut W,
82}
83impl<'a> ATL_BASE_W<'a> {
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub unsafe fn bits(self, value: u32) -> &'a mut W {
87        self.w.bits = (self.w.bits & !(0x007f_ffff << 9)) | ((value as u32 & 0x007f_ffff) << 9);
88        self.w
89    }
90}
91impl R {
92    #[doc = "Bits 4:8 - This indicates the current PTD that is used by the hardware when it is processing the ATL list."]
93    #[inline(always)]
94    pub fn atl_cur(&self) -> ATL_CUR_R {
95        ATL_CUR_R::new(((self.bits >> 4) & 0x1f) as u8)
96    }
97    #[doc = "Bits 9:31 - Base address to be used by the hardware to find the start of the ATL list."]
98    #[inline(always)]
99    pub fn atl_base(&self) -> ATL_BASE_R {
100        ATL_BASE_R::new(((self.bits >> 9) & 0x007f_ffff) as u32)
101    }
102}
103impl W {
104    #[doc = "Bits 4:8 - This indicates the current PTD that is used by the hardware when it is processing the ATL list."]
105    #[inline(always)]
106    pub fn atl_cur(&mut self) -> ATL_CUR_W {
107        ATL_CUR_W { w: self }
108    }
109    #[doc = "Bits 9:31 - Base address to be used by the hardware to find the start of the ATL list."]
110    #[inline(always)]
111    pub fn atl_base(&mut self) -> ATL_BASE_W {
112        ATL_BASE_W { w: self }
113    }
114    #[doc = "Writes raw bits to the register."]
115    #[inline(always)]
116    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
117        self.0.bits(bits);
118        self
119    }
120}
121#[doc = "Memory base address where ATL PTD0 is stored\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [atlptd](index.html) module"]
122pub struct ATLPTD_SPEC;
123impl crate::RegisterSpec for ATLPTD_SPEC {
124    type Ux = u32;
125}
126#[doc = "`read()` method returns [atlptd::R](R) reader structure"]
127impl crate::Readable for ATLPTD_SPEC {
128    type Reader = R;
129}
130#[doc = "`write(|w| ..)` method takes [atlptd::W](W) writer structure"]
131impl crate::Writable for ATLPTD_SPEC {
132    type Writer = W;
133}
134#[doc = "`reset()` method sets ATLPTD to value 0"]
135impl crate::Resettable for ATLPTD_SPEC {
136    #[inline(always)]
137    fn reset_value() -> Self::Ux {
138        0
139    }
140}
lpc55_pac/usbhsh/atlptd.rs

lpc55_pac/usbhsh/
atlptd.rs
