lpc55_pac/flash/
int_enable.rs

1#[doc = "Register `INT_ENABLE` reader"]
2pub struct R(crate::R<INT_ENABLE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INT_ENABLE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INT_ENABLE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INT_ENABLE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INT_ENABLE` writer"]
17pub struct W(crate::W<INT_ENABLE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INT_ENABLE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INT_ENABLE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INT_ENABLE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `FAIL` reader - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
38pub struct FAIL_R(crate::FieldReader<bool, bool>);
39impl FAIL_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        FAIL_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for FAIL_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `ERR` reader - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
53pub struct ERR_R(crate::FieldReader<bool, bool>);
54impl ERR_R {
55    #[inline(always)]
56    pub(crate) fn new(bits: bool) -> Self {
57        ERR_R(crate::FieldReader::new(bits))
58    }
59}
60impl core::ops::Deref for ERR_R {
61    type Target = crate::FieldReader<bool, bool>;
62    #[inline(always)]
63    fn deref(&self) -> &Self::Target {
64        &self.0
65    }
66}
67#[doc = "Field `DONE` reader - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
68pub struct DONE_R(crate::FieldReader<bool, bool>);
69impl DONE_R {
70    #[inline(always)]
71    pub(crate) fn new(bits: bool) -> Self {
72        DONE_R(crate::FieldReader::new(bits))
73    }
74}
75impl core::ops::Deref for DONE_R {
76    type Target = crate::FieldReader<bool, bool>;
77    #[inline(always)]
78    fn deref(&self) -> &Self::Target {
79        &self.0
80    }
81}
82#[doc = "Field `ECC_ERR` reader - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
83pub struct ECC_ERR_R(crate::FieldReader<bool, bool>);
84impl ECC_ERR_R {
85    #[inline(always)]
86    pub(crate) fn new(bits: bool) -> Self {
87        ECC_ERR_R(crate::FieldReader::new(bits))
88    }
89}
90impl core::ops::Deref for ECC_ERR_R {
91    type Target = crate::FieldReader<bool, bool>;
92    #[inline(always)]
93    fn deref(&self) -> &Self::Target {
94        &self.0
95    }
96}
97impl R {
98    #[doc = "Bit 0 - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
99    #[inline(always)]
100    pub fn fail(&self) -> FAIL_R {
101        FAIL_R::new((self.bits & 0x01) != 0)
102    }
103    #[doc = "Bit 1 - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
104    #[inline(always)]
105    pub fn err(&self) -> ERR_R {
106        ERR_R::new(((self.bits >> 1) & 0x01) != 0)
107    }
108    #[doc = "Bit 2 - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
109    #[inline(always)]
110    pub fn done(&self) -> DONE_R {
111        DONE_R::new(((self.bits >> 2) & 0x01) != 0)
112    }
113    #[doc = "Bit 3 - If an INT_ENABLE bit is set, an interrupt request will be generated if the corresponding INT_STATUS bit is high."]
114    #[inline(always)]
115    pub fn ecc_err(&self) -> ECC_ERR_R {
116        ECC_ERR_R::new(((self.bits >> 3) & 0x01) != 0)
117    }
118}
119impl W {
120    #[doc = "Writes raw bits to the register."]
121    #[inline(always)]
122    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
123        self.0.bits(bits);
124        self
125    }
126}
127#[doc = "Interrupt enable bits\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_enable](index.html) module"]
128pub struct INT_ENABLE_SPEC;
129impl crate::RegisterSpec for INT_ENABLE_SPEC {
130    type Ux = u32;
131}
132#[doc = "`read()` method returns [int_enable::R](R) reader structure"]
133impl crate::Readable for INT_ENABLE_SPEC {
134    type Reader = R;
135}
136#[doc = "`write(|w| ..)` method takes [int_enable::W](W) writer structure"]
137impl crate::Writable for INT_ENABLE_SPEC {
138    type Writer = W;
139}
140#[doc = "`reset()` method sets INT_ENABLE to value 0"]
141impl crate::Resettable for INT_ENABLE_SPEC {
142    #[inline(always)]
143    fn reset_value() -> Self::Ux {
144        0
145    }
146}
lpc55_pac/flash/int_enable.rs

lpc55_pac/flash/
int_enable.rs
