lpc55_pac/ahb_secure_ctrl/
cpu1_lock_reg.rs

1#[doc = "Register `CPU1_LOCK_REG` reader"]
2pub struct R(crate::R<CPU1_LOCK_REG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CPU1_LOCK_REG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CPU1_LOCK_REG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CPU1_LOCK_REG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CPU1_LOCK_REG` writer"]
17pub struct W(crate::W<CPU1_LOCK_REG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CPU1_LOCK_REG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CPU1_LOCK_REG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CPU1_LOCK_REG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "micro-Cortex M33 (CPU1) VTOR_NS register write-lock.\n\nValue on reset: 2"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum LOCK_NS_VTOR_A {
41    #[doc = "1: Restricted mode."]
42    BLOCKED = 1,
43    #[doc = "2: Writable."]
44    WRITABLE = 2,
45}
46impl From<LOCK_NS_VTOR_A> for u8 {
47    #[inline(always)]
48    fn from(variant: LOCK_NS_VTOR_A) -> Self {
49        variant as _
50    }
51}
52#[doc = "Field `LOCK_NS_VTOR` reader - micro-Cortex M33 (CPU1) VTOR_NS register write-lock."]
53pub struct LOCK_NS_VTOR_R(crate::FieldReader<u8, LOCK_NS_VTOR_A>);
54impl LOCK_NS_VTOR_R {
55    #[inline(always)]
56    pub(crate) fn new(bits: u8) -> Self {
57        LOCK_NS_VTOR_R(crate::FieldReader::new(bits))
58    }
59    #[doc = r"Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> Option<LOCK_NS_VTOR_A> {
62        match self.bits {
63            1 => Some(LOCK_NS_VTOR_A::BLOCKED),
64            2 => Some(LOCK_NS_VTOR_A::WRITABLE),
65            _ => None,
66        }
67    }
68    #[doc = "Checks if the value of the field is `BLOCKED`"]
69    #[inline(always)]
70    pub fn is_blocked(&self) -> bool {
71        **self == LOCK_NS_VTOR_A::BLOCKED
72    }
73    #[doc = "Checks if the value of the field is `WRITABLE`"]
74    #[inline(always)]
75    pub fn is_writable(&self) -> bool {
76        **self == LOCK_NS_VTOR_A::WRITABLE
77    }
78}
79impl core::ops::Deref for LOCK_NS_VTOR_R {
80    type Target = crate::FieldReader<u8, LOCK_NS_VTOR_A>;
81    #[inline(always)]
82    fn deref(&self) -> &Self::Target {
83        &self.0
84    }
85}
86#[doc = "Field `LOCK_NS_VTOR` writer - micro-Cortex M33 (CPU1) VTOR_NS register write-lock."]
87pub struct LOCK_NS_VTOR_W<'a> {
88    w: &'a mut W,
89}
90impl<'a> LOCK_NS_VTOR_W<'a> {
91    #[doc = r"Writes `variant` to the field"]
92    #[inline(always)]
93    pub fn variant(self, variant: LOCK_NS_VTOR_A) -> &'a mut W {
94        unsafe { self.bits(variant.into()) }
95    }
96    #[doc = "Restricted mode."]
97    #[inline(always)]
98    pub fn blocked(self) -> &'a mut W {
99        self.variant(LOCK_NS_VTOR_A::BLOCKED)
100    }
101    #[doc = "Writable."]
102    #[inline(always)]
103    pub fn writable(self) -> &'a mut W {
104        self.variant(LOCK_NS_VTOR_A::WRITABLE)
105    }
106    #[doc = r"Writes raw bits to the field"]
107    #[inline(always)]
108    pub unsafe fn bits(self, value: u8) -> &'a mut W {
109        self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03);
110        self.w
111    }
112}
113#[doc = "micro-Cortex M33 (CPU1) non-secure MPU register write-lock.\n\nValue on reset: 2"]
114#[derive(Clone, Copy, Debug, PartialEq)]
115#[repr(u8)]
116pub enum LOCK_NS_MPU_A {
117    #[doc = "1: Restricted mode."]
118    BLOCKED = 1,
119    #[doc = "2: Writable."]
120    WRITABLE = 2,
121}
122impl From<LOCK_NS_MPU_A> for u8 {
123    #[inline(always)]
124    fn from(variant: LOCK_NS_MPU_A) -> Self {
125        variant as _
126    }
127}
128#[doc = "Field `LOCK_NS_MPU` reader - micro-Cortex M33 (CPU1) non-secure MPU register write-lock."]
129pub struct LOCK_NS_MPU_R(crate::FieldReader<u8, LOCK_NS_MPU_A>);
130impl LOCK_NS_MPU_R {
131    #[inline(always)]
132    pub(crate) fn new(bits: u8) -> Self {
133        LOCK_NS_MPU_R(crate::FieldReader::new(bits))
134    }
135    #[doc = r"Get enumerated values variant"]
136    #[inline(always)]
137    pub fn variant(&self) -> Option<LOCK_NS_MPU_A> {
138        match self.bits {
139            1 => Some(LOCK_NS_MPU_A::BLOCKED),
140            2 => Some(LOCK_NS_MPU_A::WRITABLE),
141            _ => None,
142        }
143    }
144    #[doc = "Checks if the value of the field is `BLOCKED`"]
145    #[inline(always)]
146    pub fn is_blocked(&self) -> bool {
147        **self == LOCK_NS_MPU_A::BLOCKED
148    }
149    #[doc = "Checks if the value of the field is `WRITABLE`"]
150    #[inline(always)]
151    pub fn is_writable(&self) -> bool {
152        **self == LOCK_NS_MPU_A::WRITABLE
153    }
154}
155impl core::ops::Deref for LOCK_NS_MPU_R {
156    type Target = crate::FieldReader<u8, LOCK_NS_MPU_A>;
157    #[inline(always)]
158    fn deref(&self) -> &Self::Target {
159        &self.0
160    }
161}
162#[doc = "Field `LOCK_NS_MPU` writer - micro-Cortex M33 (CPU1) non-secure MPU register write-lock."]
163pub struct LOCK_NS_MPU_W<'a> {
164    w: &'a mut W,
165}
166impl<'a> LOCK_NS_MPU_W<'a> {
167    #[doc = r"Writes `variant` to the field"]
168    #[inline(always)]
169    pub fn variant(self, variant: LOCK_NS_MPU_A) -> &'a mut W {
170        unsafe { self.bits(variant.into()) }
171    }
172    #[doc = "Restricted mode."]
173    #[inline(always)]
174    pub fn blocked(self) -> &'a mut W {
175        self.variant(LOCK_NS_MPU_A::BLOCKED)
176    }
177    #[doc = "Writable."]
178    #[inline(always)]
179    pub fn writable(self) -> &'a mut W {
180        self.variant(LOCK_NS_MPU_A::WRITABLE)
181    }
182    #[doc = r"Writes raw bits to the field"]
183    #[inline(always)]
184    pub unsafe fn bits(self, value: u8) -> &'a mut W {
185        self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2);
186        self.w
187    }
188}
189#[doc = "CPU1_LOCK_REG write-lock.\n\nValue on reset: 2"]
190#[derive(Clone, Copy, Debug, PartialEq)]
191#[repr(u8)]
192pub enum CPU1_LOCK_REG_LOCK_A {
193    #[doc = "1: Restricted mode."]
194    BLOCKED = 1,
195    #[doc = "2: Writable."]
196    WRITABLE = 2,
197}
198impl From<CPU1_LOCK_REG_LOCK_A> for u8 {
199    #[inline(always)]
200    fn from(variant: CPU1_LOCK_REG_LOCK_A) -> Self {
201        variant as _
202    }
203}
204#[doc = "Field `CPU1_LOCK_REG_LOCK` reader - CPU1_LOCK_REG write-lock."]
205pub struct CPU1_LOCK_REG_LOCK_R(crate::FieldReader<u8, CPU1_LOCK_REG_LOCK_A>);
206impl CPU1_LOCK_REG_LOCK_R {
207    #[inline(always)]
208    pub(crate) fn new(bits: u8) -> Self {
209        CPU1_LOCK_REG_LOCK_R(crate::FieldReader::new(bits))
210    }
211    #[doc = r"Get enumerated values variant"]
212    #[inline(always)]
213    pub fn variant(&self) -> Option<CPU1_LOCK_REG_LOCK_A> {
214        match self.bits {
215            1 => Some(CPU1_LOCK_REG_LOCK_A::BLOCKED),
216            2 => Some(CPU1_LOCK_REG_LOCK_A::WRITABLE),
217            _ => None,
218        }
219    }
220    #[doc = "Checks if the value of the field is `BLOCKED`"]
221    #[inline(always)]
222    pub fn is_blocked(&self) -> bool {
223        **self == CPU1_LOCK_REG_LOCK_A::BLOCKED
224    }
225    #[doc = "Checks if the value of the field is `WRITABLE`"]
226    #[inline(always)]
227    pub fn is_writable(&self) -> bool {
228        **self == CPU1_LOCK_REG_LOCK_A::WRITABLE
229    }
230}
231impl core::ops::Deref for CPU1_LOCK_REG_LOCK_R {
232    type Target = crate::FieldReader<u8, CPU1_LOCK_REG_LOCK_A>;
233    #[inline(always)]
234    fn deref(&self) -> &Self::Target {
235        &self.0
236    }
237}
238#[doc = "Field `CPU1_LOCK_REG_LOCK` writer - CPU1_LOCK_REG write-lock."]
239pub struct CPU1_LOCK_REG_LOCK_W<'a> {
240    w: &'a mut W,
241}
242impl<'a> CPU1_LOCK_REG_LOCK_W<'a> {
243    #[doc = r"Writes `variant` to the field"]
244    #[inline(always)]
245    pub fn variant(self, variant: CPU1_LOCK_REG_LOCK_A) -> &'a mut W {
246        unsafe { self.bits(variant.into()) }
247    }
248    #[doc = "Restricted mode."]
249    #[inline(always)]
250    pub fn blocked(self) -> &'a mut W {
251        self.variant(CPU1_LOCK_REG_LOCK_A::BLOCKED)
252    }
253    #[doc = "Writable."]
254    #[inline(always)]
255    pub fn writable(self) -> &'a mut W {
256        self.variant(CPU1_LOCK_REG_LOCK_A::WRITABLE)
257    }
258    #[doc = r"Writes raw bits to the field"]
259    #[inline(always)]
260    pub unsafe fn bits(self, value: u8) -> &'a mut W {
261        self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30);
262        self.w
263    }
264}
265impl R {
266    #[doc = "Bits 0:1 - micro-Cortex M33 (CPU1) VTOR_NS register write-lock."]
267    #[inline(always)]
268    pub fn lock_ns_vtor(&self) -> LOCK_NS_VTOR_R {
269        LOCK_NS_VTOR_R::new((self.bits & 0x03) as u8)
270    }
271    #[doc = "Bits 2:3 - micro-Cortex M33 (CPU1) non-secure MPU register write-lock."]
272    #[inline(always)]
273    pub fn lock_ns_mpu(&self) -> LOCK_NS_MPU_R {
274        LOCK_NS_MPU_R::new(((self.bits >> 2) & 0x03) as u8)
275    }
276    #[doc = "Bits 30:31 - CPU1_LOCK_REG write-lock."]
277    #[inline(always)]
278    pub fn cpu1_lock_reg_lock(&self) -> CPU1_LOCK_REG_LOCK_R {
279        CPU1_LOCK_REG_LOCK_R::new(((self.bits >> 30) & 0x03) as u8)
280    }
281}
282impl W {
283    #[doc = "Bits 0:1 - micro-Cortex M33 (CPU1) VTOR_NS register write-lock."]
284    #[inline(always)]
285    pub fn lock_ns_vtor(&mut self) -> LOCK_NS_VTOR_W {
286        LOCK_NS_VTOR_W { w: self }
287    }
288    #[doc = "Bits 2:3 - micro-Cortex M33 (CPU1) non-secure MPU register write-lock."]
289    #[inline(always)]
290    pub fn lock_ns_mpu(&mut self) -> LOCK_NS_MPU_W {
291        LOCK_NS_MPU_W { w: self }
292    }
293    #[doc = "Bits 30:31 - CPU1_LOCK_REG write-lock."]
294    #[inline(always)]
295    pub fn cpu1_lock_reg_lock(&mut self) -> CPU1_LOCK_REG_LOCK_W {
296        CPU1_LOCK_REG_LOCK_W { w: self }
297    }
298    #[doc = "Writes raw bits to the register."]
299    #[inline(always)]
300    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
301        self.0.bits(bits);
302        self
303    }
304}
305#[doc = "Miscalleneous control signals for in micro-Cortex M33 (CPU1)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpu1_lock_reg](index.html) module"]
306pub struct CPU1_LOCK_REG_SPEC;
307impl crate::RegisterSpec for CPU1_LOCK_REG_SPEC {
308    type Ux = u32;
309}
310#[doc = "`read()` method returns [cpu1_lock_reg::R](R) reader structure"]
311impl crate::Readable for CPU1_LOCK_REG_SPEC {
312    type Reader = R;
313}
314#[doc = "`write(|w| ..)` method takes [cpu1_lock_reg::W](W) writer structure"]
315impl crate::Writable for CPU1_LOCK_REG_SPEC {
316    type Writer = W;
317}
318#[doc = "`reset()` method sets CPU1_LOCK_REG to value 0x8000_000a"]
319impl crate::Resettable for CPU1_LOCK_REG_SPEC {
320    #[inline(always)]
321    fn reset_value() -> Self::Ux {
322        0x8000_000a
323    }
324}
lpc55_pac/ahb_secure_ctrl/cpu1_lock_reg.rs

lpc55_pac/ahb_secure_ctrl/
cpu1_lock_reg.rs
