Expand description

USB0 Full-speed Host controller

Modules

Contains the physical address of the current endpoint descriptor of the bulk list

Contains the physical address of the first endpoint descriptor of the bulk list

This register is used to receive the commands from the Host Controller Driver (HCD)

Defines the operating modes of the HC

Contains the physical address of the current endpoint descriptor of the control list

Contains the physical address of the first endpoint descriptor of the control list

Contains the physical address of the last transfer descriptor added to the ‘Done’ queue

Defines the bit time interval in a frame and the full speed maximum packet size which would not cause an overrun

Contains a 16-bit counter and provides the timing reference among events happening in the HC and the HCD

A 14-bit counter showing the bit time remaining in the current frame

Contains the physical address of the host controller communication area

The bits in this register are used to disable corresponding bits in the HCInterruptStatus register and in turn disable that event leading to hardware interrupt

Controls the bits in the HcInterruptStatus register and indicates which events will generate a hardware interrupt

Indicates the status on various events that cause hardware interrupts by setting the appropriate bits

Contains 11-bit value which is used by the HC to determine whether to commit to transfer a maximum of 8-byte LS packet before EOF

Contains the physical address of the current isochronous or interrupt endpoint descriptor

Contains a programmable 14-bit value which determines the earliest time HC should start processing a periodic list

BCD representation of the version of the HCI specification that is implemented by the Host Controller (HC)

First of the two registers which describes the characteristics of the root hub

Second of the two registers which describes the characteristics of the Root Hub

Controls and reports the port events on a per-port basis

This register is divided into two parts

Controls the port if it is attached to the host block or the device block

Structs

Register block

Type Definitions

HCBULKCURRENTED register accessor: an alias for Reg<HCBULKCURRENTED_SPEC>

HCBULKHEADED register accessor: an alias for Reg<HCBULKHEADED_SPEC>

HCCOMMANDSTATUS register accessor: an alias for Reg<HCCOMMANDSTATUS_SPEC>

HCCONTROL register accessor: an alias for Reg<HCCONTROL_SPEC>

HCCONTROLCURRENTED register accessor: an alias for Reg<HCCONTROLCURRENTED_SPEC>

HCCONTROLHEADED register accessor: an alias for Reg<HCCONTROLHEADED_SPEC>

HCDONEHEAD register accessor: an alias for Reg<HCDONEHEAD_SPEC>

HCFMINTERVAL register accessor: an alias for Reg<HCFMINTERVAL_SPEC>

HCFMNUMBER register accessor: an alias for Reg<HCFMNUMBER_SPEC>

HCFMREMAINING register accessor: an alias for Reg<HCFMREMAINING_SPEC>

HCHCCA register accessor: an alias for Reg<HCHCCA_SPEC>

HCINTERRUPTDISABLE register accessor: an alias for Reg<HCINTERRUPTDISABLE_SPEC>

HCINTERRUPTENABLE register accessor: an alias for Reg<HCINTERRUPTENABLE_SPEC>

HCINTERRUPTSTATUS register accessor: an alias for Reg<HCINTERRUPTSTATUS_SPEC>

HCLSTHRESHOLD register accessor: an alias for Reg<HCLSTHRESHOLD_SPEC>

HCPERIODCURRENTED register accessor: an alias for Reg<HCPERIODCURRENTED_SPEC>

HCPERIODICSTART register accessor: an alias for Reg<HCPERIODICSTART_SPEC>

HCREVISION register accessor: an alias for Reg<HCREVISION_SPEC>

HCRHDESCRIPTORA register accessor: an alias for Reg<HCRHDESCRIPTORA_SPEC>

HCRHDESCRIPTORB register accessor: an alias for Reg<HCRHDESCRIPTORB_SPEC>

HCRHPORTSTATUS register accessor: an alias for Reg<HCRHPORTSTATUS_SPEC>

HCRHSTATUS register accessor: an alias for Reg<HCRHSTATUS_SPEC>

PORTMODE register accessor: an alias for Reg<PORTMODE_SPEC>