pub struct INTENSET_SPEC;
Expand description
Interrupt Enable read and Set register for USART (not FIFO) status. Contains individual interrupt enable bits for each potential USART interrupt. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see intenset module
Trait Implementations
sourceimpl Readable for INTENSET_SPEC
impl Readable for INTENSET_SPEC
read()
method returns intenset::R reader structure
sourceimpl RegisterSpec for INTENSET_SPEC
impl RegisterSpec for INTENSET_SPEC
sourceimpl Resettable for INTENSET_SPEC
impl Resettable for INTENSET_SPEC
reset()
method sets INTENSET to value 0
sourcefn reset_value() -> Self::Ux
fn reset_value() -> Self::Ux
Reset value of the register.
sourceimpl Writable for INTENSET_SPEC
impl Writable for INTENSET_SPEC
write(|w| ..)
method takes intenset::W writer structure
Auto Trait Implementations
impl RefUnwindSafe for INTENSET_SPEC
impl Send for INTENSET_SPEC
impl Sync for INTENSET_SPEC
impl Unpin for INTENSET_SPEC
impl UnwindSafe for INTENSET_SPEC
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more