Struct lpc55_pac::syscon::pll1ctrl::W

pub struct W(_);

Register PLL1CTRL writer

Implementations

impl W

pub fn selr(&mut self) -> SELR_W<'_>

Bits 0:3 - Bandwidth select R value.

pub fn seli(&mut self) -> SELI_W<'_>

Bits 4:9 - Bandwidth select I value.

pub fn selp(&mut self) -> SELP_W<'_>

Bits 10:14 - Bandwidth select P value.

pub fn bypasspll(&mut self) -> BYPASSPLL_W<'_>

Bit 15 - Bypass PLL input clock is sent directly to the PLL output (default).

pub fn bypasspostdiv2(&mut self) -> BYPASSPOSTDIV2_W<'_>

Bit 16 - bypass of the divide-by-2 divider in the post-divider.

pub fn limupoff(&mut self) -> LIMUPOFF_W<'_>

Bit 17 - limup_off = 1 in spread spectrum and fractional PLL applications.

pub fn bwdirect(&mut self) -> BWDIRECT_W<'_>

Bit 18 - control of the bandwidth of the PLL.

pub fn bypassprediv(&mut self) -> BYPASSPREDIV_W<'_>

Bit 19 - bypass of the pre-divider.

pub fn bypasspostdiv(&mut self) -> BYPASSPOSTDIV_W<'_>

Bit 20 - bypass of the post-divider.

pub fn clken(&mut self) -> CLKEN_W<'_>

Bit 21 - enable the output clock.

pub fn frmen(&mut self) -> FRMEN_W<'_>

Bit 22 - 1: free running mode.

pub fn frmclkstable(&mut self) -> FRMCLKSTABLE_W<'_>

Bit 23 - free running mode clockstable: Warning: Only make frm_clockstable = 1 after the PLL output frequency is stable.

pub fn skewen(&mut self) -> SKEWEN_W<'_>

Bit 24 - Skew mode.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<PLL1CTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<PLL1CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<PLL1CTRL_SPEC>> for W

fn from(writer: W<PLL1CTRL_SPEC>) -> Self

Performs the conversion.