Struct lpc55_pac::syscon::fcclksel2::FCCLKSEL2_SPEC

pub struct FCCLKSEL2_SPEC;

Flexcomm Interface 2 clock source select for Fractional Rate Divider

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see fcclksel2 module

Trait Implementations

impl Readable for FCCLKSEL2_SPEC

read() method returns fcclksel2::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for FCCLKSEL2_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for FCCLKSEL2_SPEC

reset() method sets FCCLKSEL2 to value 0x07

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for FCCLKSEL2_SPEC

write(|w| ..) method takes fcclksel2::W writer structure

type Writer = W

Writer type argument to write, et al.