Struct lpc55_pac::spi0::fifotrig::TXLVL_W

source · [−]

pub struct TXLVL_W<'a> { /* private fields */ }

Expand description

Field TXLVL writer - Transmit FIFO level trigger point. This field is used only when TXLVLENA = 1. If enabled to do so, the FIFO level can wake up the device just enough to perform DMA, then return to the reduced power mode. See Hardware Wake-up control register. 0 = trigger when the TX FIFO becomes empty. 1 = trigger when the TX FIFO level decreases to one entry. 15 = trigger when the TX FIFO level decreases to 15 entries (is no longer full).

Implementations

impl<'a> TXLVL_W<'a>

pub unsafe fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field

Auto Trait Implementations

impl<'a> RefUnwindSafe for TXLVL_W<'a>

impl<'a> Send for TXLVL_W<'a>

impl<'a> Sync for TXLVL_W<'a>

impl<'a> Unpin for TXLVL_W<'a>

impl<'a> !UnwindSafe for TXLVL_W<'a>

Blanket Implementations

impl<T> Any for T where
T: 'static + ?Sized,

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const: unstable · source

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