pub struct W(_);
Expand description

Register FIFOCFG writer

Implementations

Bit 0 - Enable the transmit FIFO.

Bit 1 - Enable the receive FIFO.

Bit 12 - DMA configuration for transmit.

Bit 13 - DMA configuration for receive.

Bit 14 - Wake-up for transmit FIFO level. This allows the device to be woken from reduced power modes (up to power-down, as long as the peripheral function works in that power mode) without enabling the TXLVL interrupt. Only DMA wakes up, processes data, and goes back to sleep. The CPU will remain stopped until woken by another cause, such as DMA completion. See Hardware Wake-up control register.

Bit 15 - Wake-up for receive FIFO level. This allows the device to be woken from reduced power modes (up to power-down, as long as the peripheral function works in that power mode) without enabling the TXLVL interrupt. Only DMA wakes up, processes data, and goes back to sleep. The CPU will remain stopped until woken by another cause, such as DMA completion. See Hardware Wake-up control register.

Bit 16 - Empty command for the transmit FIFO. When a 1 is written to this bit, the TX FIFO is emptied.

Bit 17 - Empty command for the receive FIFO. When a 1 is written to this bit, the RX FIFO is emptied.

Writes raw bits to the register.

Methods from Deref<Target = W<FIFOCFG_SPEC>>

Writes raw bits to the register.

Trait Implementations

The resulting type after dereferencing.

Dereferences the value.

Mutably dereferences the value.

Performs the conversion.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.