lpc55_pac/usbphy/
ctrl_set.rs

1#[doc = "Register `CTRL_SET` reader"]
2pub struct R(crate::R<CTRL_SET_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SET_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SET_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SET_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL_SET` writer"]
17pub struct W(crate::W<CTRL_SET_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SET_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SET_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SET_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ENHOSTDISCONDETECT` reader - For host mode, enables high-speed disconnect detector"]
38pub struct ENHOSTDISCONDETECT_R(crate::FieldReader<bool, bool>);
39impl ENHOSTDISCONDETECT_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        ENHOSTDISCONDETECT_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for ENHOSTDISCONDETECT_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `ENHOSTDISCONDETECT` writer - For host mode, enables high-speed disconnect detector"]
53pub struct ENHOSTDISCONDETECT_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> ENHOSTDISCONDETECT_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
71        self.w
72    }
73}
74#[doc = "Field `ENIRQHOSTDISCON` reader - Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode"]
75pub struct ENIRQHOSTDISCON_R(crate::FieldReader<bool, bool>);
76impl ENIRQHOSTDISCON_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        ENIRQHOSTDISCON_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for ENIRQHOSTDISCON_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `ENIRQHOSTDISCON` writer - Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode"]
90pub struct ENIRQHOSTDISCON_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> ENIRQHOSTDISCON_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
108        self.w
109    }
110}
111#[doc = "Field `HOSTDISCONDETECT_IRQ` reader - Indicates that the device has disconnected in High-Speed mode"]
112pub struct HOSTDISCONDETECT_IRQ_R(crate::FieldReader<bool, bool>);
113impl HOSTDISCONDETECT_IRQ_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        HOSTDISCONDETECT_IRQ_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for HOSTDISCONDETECT_IRQ_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `HOSTDISCONDETECT_IRQ` writer - Indicates that the device has disconnected in High-Speed mode"]
127pub struct HOSTDISCONDETECT_IRQ_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> HOSTDISCONDETECT_IRQ_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
145        self.w
146    }
147}
148#[doc = "Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode\n\nValue on reset: 0"]
149#[derive(Clone, Copy, Debug, PartialEq)]
150pub enum ENDEVPLUGINDET_A {
151    #[doc = "0: Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default)"]
152    VALUE0 = 0,
153    #[doc = "1: Enables 200kohm pullup resistors on USB_DP and USB_DM pins"]
154    VALUE1 = 1,
155}
156impl From<ENDEVPLUGINDET_A> for bool {
157    #[inline(always)]
158    fn from(variant: ENDEVPLUGINDET_A) -> Self {
159        variant as u8 != 0
160    }
161}
162#[doc = "Field `ENDEVPLUGINDET` reader - Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode"]
163pub struct ENDEVPLUGINDET_R(crate::FieldReader<bool, ENDEVPLUGINDET_A>);
164impl ENDEVPLUGINDET_R {
165    #[inline(always)]
166    pub(crate) fn new(bits: bool) -> Self {
167        ENDEVPLUGINDET_R(crate::FieldReader::new(bits))
168    }
169    #[doc = r"Get enumerated values variant"]
170    #[inline(always)]
171    pub fn variant(&self) -> ENDEVPLUGINDET_A {
172        match self.bits {
173            false => ENDEVPLUGINDET_A::VALUE0,
174            true => ENDEVPLUGINDET_A::VALUE1,
175        }
176    }
177    #[doc = "Checks if the value of the field is `VALUE0`"]
178    #[inline(always)]
179    pub fn is_value0(&self) -> bool {
180        **self == ENDEVPLUGINDET_A::VALUE0
181    }
182    #[doc = "Checks if the value of the field is `VALUE1`"]
183    #[inline(always)]
184    pub fn is_value1(&self) -> bool {
185        **self == ENDEVPLUGINDET_A::VALUE1
186    }
187}
188impl core::ops::Deref for ENDEVPLUGINDET_R {
189    type Target = crate::FieldReader<bool, ENDEVPLUGINDET_A>;
190    #[inline(always)]
191    fn deref(&self) -> &Self::Target {
192        &self.0
193    }
194}
195#[doc = "Field `ENDEVPLUGINDET` writer - Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode"]
196pub struct ENDEVPLUGINDET_W<'a> {
197    w: &'a mut W,
198}
199impl<'a> ENDEVPLUGINDET_W<'a> {
200    #[doc = r"Writes `variant` to the field"]
201    #[inline(always)]
202    pub fn variant(self, variant: ENDEVPLUGINDET_A) -> &'a mut W {
203        self.bit(variant.into())
204    }
205    #[doc = "Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default)"]
206    #[inline(always)]
207    pub fn value0(self) -> &'a mut W {
208        self.variant(ENDEVPLUGINDET_A::VALUE0)
209    }
210    #[doc = "Enables 200kohm pullup resistors on USB_DP and USB_DM pins"]
211    #[inline(always)]
212    pub fn value1(self) -> &'a mut W {
213        self.variant(ENDEVPLUGINDET_A::VALUE1)
214    }
215    #[doc = r"Sets the field bit"]
216    #[inline(always)]
217    pub fn set_bit(self) -> &'a mut W {
218        self.bit(true)
219    }
220    #[doc = r"Clears the field bit"]
221    #[inline(always)]
222    pub fn clear_bit(self) -> &'a mut W {
223        self.bit(false)
224    }
225    #[doc = r"Writes raw bits to the field"]
226    #[inline(always)]
227    pub fn bit(self, value: bool) -> &'a mut W {
228        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
229        self.w
230    }
231}
232#[doc = "Field `DEVPLUGIN_POLARITY` reader - Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in"]
233pub struct DEVPLUGIN_POLARITY_R(crate::FieldReader<bool, bool>);
234impl DEVPLUGIN_POLARITY_R {
235    #[inline(always)]
236    pub(crate) fn new(bits: bool) -> Self {
237        DEVPLUGIN_POLARITY_R(crate::FieldReader::new(bits))
238    }
239}
240impl core::ops::Deref for DEVPLUGIN_POLARITY_R {
241    type Target = crate::FieldReader<bool, bool>;
242    #[inline(always)]
243    fn deref(&self) -> &Self::Target {
244        &self.0
245    }
246}
247#[doc = "Field `DEVPLUGIN_POLARITY` writer - Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in"]
248pub struct DEVPLUGIN_POLARITY_W<'a> {
249    w: &'a mut W,
250}
251impl<'a> DEVPLUGIN_POLARITY_W<'a> {
252    #[doc = r"Sets the field bit"]
253    #[inline(always)]
254    pub fn set_bit(self) -> &'a mut W {
255        self.bit(true)
256    }
257    #[doc = r"Clears the field bit"]
258    #[inline(always)]
259    pub fn clear_bit(self) -> &'a mut W {
260        self.bit(false)
261    }
262    #[doc = r"Writes raw bits to the field"]
263    #[inline(always)]
264    pub fn bit(self, value: bool) -> &'a mut W {
265        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
266        self.w
267    }
268}
269#[doc = "Field `RESUMEIRQSTICKY` reader - Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it"]
270pub struct RESUMEIRQSTICKY_R(crate::FieldReader<bool, bool>);
271impl RESUMEIRQSTICKY_R {
272    #[inline(always)]
273    pub(crate) fn new(bits: bool) -> Self {
274        RESUMEIRQSTICKY_R(crate::FieldReader::new(bits))
275    }
276}
277impl core::ops::Deref for RESUMEIRQSTICKY_R {
278    type Target = crate::FieldReader<bool, bool>;
279    #[inline(always)]
280    fn deref(&self) -> &Self::Target {
281        &self.0
282    }
283}
284#[doc = "Field `RESUMEIRQSTICKY` writer - Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it"]
285pub struct RESUMEIRQSTICKY_W<'a> {
286    w: &'a mut W,
287}
288impl<'a> RESUMEIRQSTICKY_W<'a> {
289    #[doc = r"Sets the field bit"]
290    #[inline(always)]
291    pub fn set_bit(self) -> &'a mut W {
292        self.bit(true)
293    }
294    #[doc = r"Clears the field bit"]
295    #[inline(always)]
296    pub fn clear_bit(self) -> &'a mut W {
297        self.bit(false)
298    }
299    #[doc = r"Writes raw bits to the field"]
300    #[inline(always)]
301    pub fn bit(self, value: bool) -> &'a mut W {
302        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
303        self.w
304    }
305}
306#[doc = "Field `ENIRQRESUMEDETECT` reader - Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line"]
307pub struct ENIRQRESUMEDETECT_R(crate::FieldReader<bool, bool>);
308impl ENIRQRESUMEDETECT_R {
309    #[inline(always)]
310    pub(crate) fn new(bits: bool) -> Self {
311        ENIRQRESUMEDETECT_R(crate::FieldReader::new(bits))
312    }
313}
314impl core::ops::Deref for ENIRQRESUMEDETECT_R {
315    type Target = crate::FieldReader<bool, bool>;
316    #[inline(always)]
317    fn deref(&self) -> &Self::Target {
318        &self.0
319    }
320}
321#[doc = "Field `ENIRQRESUMEDETECT` writer - Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line"]
322pub struct ENIRQRESUMEDETECT_W<'a> {
323    w: &'a mut W,
324}
325impl<'a> ENIRQRESUMEDETECT_W<'a> {
326    #[doc = r"Sets the field bit"]
327    #[inline(always)]
328    pub fn set_bit(self) -> &'a mut W {
329        self.bit(true)
330    }
331    #[doc = r"Clears the field bit"]
332    #[inline(always)]
333    pub fn clear_bit(self) -> &'a mut W {
334        self.bit(false)
335    }
336    #[doc = r"Writes raw bits to the field"]
337    #[inline(always)]
338    pub fn bit(self, value: bool) -> &'a mut W {
339        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
340        self.w
341    }
342}
343#[doc = "Field `RESUME_IRQ` reader - Resume IRQ: Indicates that the host is sending a wake-up after suspend"]
344pub struct RESUME_IRQ_R(crate::FieldReader<bool, bool>);
345impl RESUME_IRQ_R {
346    #[inline(always)]
347    pub(crate) fn new(bits: bool) -> Self {
348        RESUME_IRQ_R(crate::FieldReader::new(bits))
349    }
350}
351impl core::ops::Deref for RESUME_IRQ_R {
352    type Target = crate::FieldReader<bool, bool>;
353    #[inline(always)]
354    fn deref(&self) -> &Self::Target {
355        &self.0
356    }
357}
358#[doc = "Field `RESUME_IRQ` writer - Resume IRQ: Indicates that the host is sending a wake-up after suspend"]
359pub struct RESUME_IRQ_W<'a> {
360    w: &'a mut W,
361}
362impl<'a> RESUME_IRQ_W<'a> {
363    #[doc = r"Sets the field bit"]
364    #[inline(always)]
365    pub fn set_bit(self) -> &'a mut W {
366        self.bit(true)
367    }
368    #[doc = r"Clears the field bit"]
369    #[inline(always)]
370    pub fn clear_bit(self) -> &'a mut W {
371        self.bit(false)
372    }
373    #[doc = r"Writes raw bits to the field"]
374    #[inline(always)]
375    pub fn bit(self, value: bool) -> &'a mut W {
376        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
377        self.w
378    }
379}
380#[doc = "Field `DEVPLUGIN_IRQ` reader - Indicates that the device is connected"]
381pub struct DEVPLUGIN_IRQ_R(crate::FieldReader<bool, bool>);
382impl DEVPLUGIN_IRQ_R {
383    #[inline(always)]
384    pub(crate) fn new(bits: bool) -> Self {
385        DEVPLUGIN_IRQ_R(crate::FieldReader::new(bits))
386    }
387}
388impl core::ops::Deref for DEVPLUGIN_IRQ_R {
389    type Target = crate::FieldReader<bool, bool>;
390    #[inline(always)]
391    fn deref(&self) -> &Self::Target {
392        &self.0
393    }
394}
395#[doc = "Field `DEVPLUGIN_IRQ` writer - Indicates that the device is connected"]
396pub struct DEVPLUGIN_IRQ_W<'a> {
397    w: &'a mut W,
398}
399impl<'a> DEVPLUGIN_IRQ_W<'a> {
400    #[doc = r"Sets the field bit"]
401    #[inline(always)]
402    pub fn set_bit(self) -> &'a mut W {
403        self.bit(true)
404    }
405    #[doc = r"Clears the field bit"]
406    #[inline(always)]
407    pub fn clear_bit(self) -> &'a mut W {
408        self.bit(false)
409    }
410    #[doc = r"Writes raw bits to the field"]
411    #[inline(always)]
412    pub fn bit(self, value: bool) -> &'a mut W {
413        self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
414        self.w
415    }
416}
417#[doc = "Field `ENUTMILEVEL2` reader - Enables UTMI+ Level 2 operation for the USB HS PHY"]
418pub struct ENUTMILEVEL2_R(crate::FieldReader<bool, bool>);
419impl ENUTMILEVEL2_R {
420    #[inline(always)]
421    pub(crate) fn new(bits: bool) -> Self {
422        ENUTMILEVEL2_R(crate::FieldReader::new(bits))
423    }
424}
425impl core::ops::Deref for ENUTMILEVEL2_R {
426    type Target = crate::FieldReader<bool, bool>;
427    #[inline(always)]
428    fn deref(&self) -> &Self::Target {
429        &self.0
430    }
431}
432#[doc = "Field `ENUTMILEVEL2` writer - Enables UTMI+ Level 2 operation for the USB HS PHY"]
433pub struct ENUTMILEVEL2_W<'a> {
434    w: &'a mut W,
435}
436impl<'a> ENUTMILEVEL2_W<'a> {
437    #[doc = r"Sets the field bit"]
438    #[inline(always)]
439    pub fn set_bit(self) -> &'a mut W {
440        self.bit(true)
441    }
442    #[doc = r"Clears the field bit"]
443    #[inline(always)]
444    pub fn clear_bit(self) -> &'a mut W {
445        self.bit(false)
446    }
447    #[doc = r"Writes raw bits to the field"]
448    #[inline(always)]
449    pub fn bit(self, value: bool) -> &'a mut W {
450        self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
451        self.w
452    }
453}
454#[doc = "Field `ENUTMILEVEL3` reader - Enables UTMI+ Level 3 operation for the USB HS PHY"]
455pub struct ENUTMILEVEL3_R(crate::FieldReader<bool, bool>);
456impl ENUTMILEVEL3_R {
457    #[inline(always)]
458    pub(crate) fn new(bits: bool) -> Self {
459        ENUTMILEVEL3_R(crate::FieldReader::new(bits))
460    }
461}
462impl core::ops::Deref for ENUTMILEVEL3_R {
463    type Target = crate::FieldReader<bool, bool>;
464    #[inline(always)]
465    fn deref(&self) -> &Self::Target {
466        &self.0
467    }
468}
469#[doc = "Field `ENUTMILEVEL3` writer - Enables UTMI+ Level 3 operation for the USB HS PHY"]
470pub struct ENUTMILEVEL3_W<'a> {
471    w: &'a mut W,
472}
473impl<'a> ENUTMILEVEL3_W<'a> {
474    #[doc = r"Sets the field bit"]
475    #[inline(always)]
476    pub fn set_bit(self) -> &'a mut W {
477        self.bit(true)
478    }
479    #[doc = r"Clears the field bit"]
480    #[inline(always)]
481    pub fn clear_bit(self) -> &'a mut W {
482        self.bit(false)
483    }
484    #[doc = r"Writes raw bits to the field"]
485    #[inline(always)]
486    pub fn bit(self, value: bool) -> &'a mut W {
487        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
488        self.w
489    }
490}
491#[doc = "Field `ENIRQWAKEUP` reader - Enable wake-up IRQ: Enables interrupt for the wake-up events."]
492pub struct ENIRQWAKEUP_R(crate::FieldReader<bool, bool>);
493impl ENIRQWAKEUP_R {
494    #[inline(always)]
495    pub(crate) fn new(bits: bool) -> Self {
496        ENIRQWAKEUP_R(crate::FieldReader::new(bits))
497    }
498}
499impl core::ops::Deref for ENIRQWAKEUP_R {
500    type Target = crate::FieldReader<bool, bool>;
501    #[inline(always)]
502    fn deref(&self) -> &Self::Target {
503        &self.0
504    }
505}
506#[doc = "Field `ENIRQWAKEUP` writer - Enable wake-up IRQ: Enables interrupt for the wake-up events."]
507pub struct ENIRQWAKEUP_W<'a> {
508    w: &'a mut W,
509}
510impl<'a> ENIRQWAKEUP_W<'a> {
511    #[doc = r"Sets the field bit"]
512    #[inline(always)]
513    pub fn set_bit(self) -> &'a mut W {
514        self.bit(true)
515    }
516    #[doc = r"Clears the field bit"]
517    #[inline(always)]
518    pub fn clear_bit(self) -> &'a mut W {
519        self.bit(false)
520    }
521    #[doc = r"Writes raw bits to the field"]
522    #[inline(always)]
523    pub fn bit(self, value: bool) -> &'a mut W {
524        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
525        self.w
526    }
527}
528#[doc = "Field `WAKEUP_IRQ` reader - Wake-up IRQ: Indicates that there is a wak-eup event"]
529pub struct WAKEUP_IRQ_R(crate::FieldReader<bool, bool>);
530impl WAKEUP_IRQ_R {
531    #[inline(always)]
532    pub(crate) fn new(bits: bool) -> Self {
533        WAKEUP_IRQ_R(crate::FieldReader::new(bits))
534    }
535}
536impl core::ops::Deref for WAKEUP_IRQ_R {
537    type Target = crate::FieldReader<bool, bool>;
538    #[inline(always)]
539    fn deref(&self) -> &Self::Target {
540        &self.0
541    }
542}
543#[doc = "Field `WAKEUP_IRQ` writer - Wake-up IRQ: Indicates that there is a wak-eup event"]
544pub struct WAKEUP_IRQ_W<'a> {
545    w: &'a mut W,
546}
547impl<'a> WAKEUP_IRQ_W<'a> {
548    #[doc = r"Sets the field bit"]
549    #[inline(always)]
550    pub fn set_bit(self) -> &'a mut W {
551        self.bit(true)
552    }
553    #[doc = r"Clears the field bit"]
554    #[inline(always)]
555    pub fn clear_bit(self) -> &'a mut W {
556        self.bit(false)
557    }
558    #[doc = r"Writes raw bits to the field"]
559    #[inline(always)]
560    pub fn bit(self, value: bool) -> &'a mut W {
561        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
562        self.w
563    }
564}
565#[doc = "Field `AUTORESUME_EN` reader - Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)"]
566pub struct AUTORESUME_EN_R(crate::FieldReader<bool, bool>);
567impl AUTORESUME_EN_R {
568    #[inline(always)]
569    pub(crate) fn new(bits: bool) -> Self {
570        AUTORESUME_EN_R(crate::FieldReader::new(bits))
571    }
572}
573impl core::ops::Deref for AUTORESUME_EN_R {
574    type Target = crate::FieldReader<bool, bool>;
575    #[inline(always)]
576    fn deref(&self) -> &Self::Target {
577        &self.0
578    }
579}
580#[doc = "Field `AUTORESUME_EN` writer - Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)"]
581pub struct AUTORESUME_EN_W<'a> {
582    w: &'a mut W,
583}
584impl<'a> AUTORESUME_EN_W<'a> {
585    #[doc = r"Sets the field bit"]
586    #[inline(always)]
587    pub fn set_bit(self) -> &'a mut W {
588        self.bit(true)
589    }
590    #[doc = r"Clears the field bit"]
591    #[inline(always)]
592    pub fn clear_bit(self) -> &'a mut W {
593        self.bit(false)
594    }
595    #[doc = r"Writes raw bits to the field"]
596    #[inline(always)]
597    pub fn bit(self, value: bool) -> &'a mut W {
598        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
599        self.w
600    }
601}
602#[doc = "Field `ENAUTOCLR_CLKGATE` reader - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended"]
603pub struct ENAUTOCLR_CLKGATE_R(crate::FieldReader<bool, bool>);
604impl ENAUTOCLR_CLKGATE_R {
605    #[inline(always)]
606    pub(crate) fn new(bits: bool) -> Self {
607        ENAUTOCLR_CLKGATE_R(crate::FieldReader::new(bits))
608    }
609}
610impl core::ops::Deref for ENAUTOCLR_CLKGATE_R {
611    type Target = crate::FieldReader<bool, bool>;
612    #[inline(always)]
613    fn deref(&self) -> &Self::Target {
614        &self.0
615    }
616}
617#[doc = "Field `ENAUTOCLR_CLKGATE` writer - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended"]
618pub struct ENAUTOCLR_CLKGATE_W<'a> {
619    w: &'a mut W,
620}
621impl<'a> ENAUTOCLR_CLKGATE_W<'a> {
622    #[doc = r"Sets the field bit"]
623    #[inline(always)]
624    pub fn set_bit(self) -> &'a mut W {
625        self.bit(true)
626    }
627    #[doc = r"Clears the field bit"]
628    #[inline(always)]
629    pub fn clear_bit(self) -> &'a mut W {
630        self.bit(false)
631    }
632    #[doc = r"Writes raw bits to the field"]
633    #[inline(always)]
634    pub fn bit(self, value: bool) -> &'a mut W {
635        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
636        self.w
637    }
638}
639#[doc = "Field `ENAUTOCLR_PHY_PWD` reader - Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended"]
640pub struct ENAUTOCLR_PHY_PWD_R(crate::FieldReader<bool, bool>);
641impl ENAUTOCLR_PHY_PWD_R {
642    #[inline(always)]
643    pub(crate) fn new(bits: bool) -> Self {
644        ENAUTOCLR_PHY_PWD_R(crate::FieldReader::new(bits))
645    }
646}
647impl core::ops::Deref for ENAUTOCLR_PHY_PWD_R {
648    type Target = crate::FieldReader<bool, bool>;
649    #[inline(always)]
650    fn deref(&self) -> &Self::Target {
651        &self.0
652    }
653}
654#[doc = "Field `ENAUTOCLR_PHY_PWD` writer - Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended"]
655pub struct ENAUTOCLR_PHY_PWD_W<'a> {
656    w: &'a mut W,
657}
658impl<'a> ENAUTOCLR_PHY_PWD_W<'a> {
659    #[doc = r"Sets the field bit"]
660    #[inline(always)]
661    pub fn set_bit(self) -> &'a mut W {
662        self.bit(true)
663    }
664    #[doc = r"Clears the field bit"]
665    #[inline(always)]
666    pub fn clear_bit(self) -> &'a mut W {
667        self.bit(false)
668    }
669    #[doc = r"Writes raw bits to the field"]
670    #[inline(always)]
671    pub fn bit(self, value: bool) -> &'a mut W {
672        self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
673        self.w
674    }
675}
676#[doc = "Field `ENDPDMCHG_WKUP` reader - Enable DP DM change wake-up: Not for customer use"]
677pub struct ENDPDMCHG_WKUP_R(crate::FieldReader<bool, bool>);
678impl ENDPDMCHG_WKUP_R {
679    #[inline(always)]
680    pub(crate) fn new(bits: bool) -> Self {
681        ENDPDMCHG_WKUP_R(crate::FieldReader::new(bits))
682    }
683}
684impl core::ops::Deref for ENDPDMCHG_WKUP_R {
685    type Target = crate::FieldReader<bool, bool>;
686    #[inline(always)]
687    fn deref(&self) -> &Self::Target {
688        &self.0
689    }
690}
691#[doc = "Field `ENDPDMCHG_WKUP` writer - Enable DP DM change wake-up: Not for customer use"]
692pub struct ENDPDMCHG_WKUP_W<'a> {
693    w: &'a mut W,
694}
695impl<'a> ENDPDMCHG_WKUP_W<'a> {
696    #[doc = r"Sets the field bit"]
697    #[inline(always)]
698    pub fn set_bit(self) -> &'a mut W {
699        self.bit(true)
700    }
701    #[doc = r"Clears the field bit"]
702    #[inline(always)]
703    pub fn clear_bit(self) -> &'a mut W {
704        self.bit(false)
705    }
706    #[doc = r"Writes raw bits to the field"]
707    #[inline(always)]
708    pub fn bit(self, value: bool) -> &'a mut W {
709        self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
710        self.w
711    }
712}
713#[doc = "Field `ENVBUSCHG_WKUP` reader - Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended"]
714pub struct ENVBUSCHG_WKUP_R(crate::FieldReader<bool, bool>);
715impl ENVBUSCHG_WKUP_R {
716    #[inline(always)]
717    pub(crate) fn new(bits: bool) -> Self {
718        ENVBUSCHG_WKUP_R(crate::FieldReader::new(bits))
719    }
720}
721impl core::ops::Deref for ENVBUSCHG_WKUP_R {
722    type Target = crate::FieldReader<bool, bool>;
723    #[inline(always)]
724    fn deref(&self) -> &Self::Target {
725        &self.0
726    }
727}
728#[doc = "Field `ENVBUSCHG_WKUP` writer - Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended"]
729pub struct ENVBUSCHG_WKUP_W<'a> {
730    w: &'a mut W,
731}
732impl<'a> ENVBUSCHG_WKUP_W<'a> {
733    #[doc = r"Sets the field bit"]
734    #[inline(always)]
735    pub fn set_bit(self) -> &'a mut W {
736        self.bit(true)
737    }
738    #[doc = r"Clears the field bit"]
739    #[inline(always)]
740    pub fn clear_bit(self) -> &'a mut W {
741        self.bit(false)
742    }
743    #[doc = r"Writes raw bits to the field"]
744    #[inline(always)]
745    pub fn bit(self, value: bool) -> &'a mut W {
746        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
747        self.w
748    }
749}
750#[doc = "Field `ENAUTOCLR_USBCLKGATE` reader - Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
751pub struct ENAUTOCLR_USBCLKGATE_R(crate::FieldReader<bool, bool>);
752impl ENAUTOCLR_USBCLKGATE_R {
753    #[inline(always)]
754    pub(crate) fn new(bits: bool) -> Self {
755        ENAUTOCLR_USBCLKGATE_R(crate::FieldReader::new(bits))
756    }
757}
758impl core::ops::Deref for ENAUTOCLR_USBCLKGATE_R {
759    type Target = crate::FieldReader<bool, bool>;
760    #[inline(always)]
761    fn deref(&self) -> &Self::Target {
762        &self.0
763    }
764}
765#[doc = "Field `ENAUTOCLR_USBCLKGATE` writer - Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
766pub struct ENAUTOCLR_USBCLKGATE_W<'a> {
767    w: &'a mut W,
768}
769impl<'a> ENAUTOCLR_USBCLKGATE_W<'a> {
770    #[doc = r"Sets the field bit"]
771    #[inline(always)]
772    pub fn set_bit(self) -> &'a mut W {
773        self.bit(true)
774    }
775    #[doc = r"Clears the field bit"]
776    #[inline(always)]
777    pub fn clear_bit(self) -> &'a mut W {
778        self.bit(false)
779    }
780    #[doc = r"Writes raw bits to the field"]
781    #[inline(always)]
782    pub fn bit(self, value: bool) -> &'a mut W {
783        self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
784        self.w
785    }
786}
787#[doc = "Field `ENAUTOSET_USBCLKS` reader - Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
788pub struct ENAUTOSET_USBCLKS_R(crate::FieldReader<bool, bool>);
789impl ENAUTOSET_USBCLKS_R {
790    #[inline(always)]
791    pub(crate) fn new(bits: bool) -> Self {
792        ENAUTOSET_USBCLKS_R(crate::FieldReader::new(bits))
793    }
794}
795impl core::ops::Deref for ENAUTOSET_USBCLKS_R {
796    type Target = crate::FieldReader<bool, bool>;
797    #[inline(always)]
798    fn deref(&self) -> &Self::Target {
799        &self.0
800    }
801}
802#[doc = "Field `ENAUTOSET_USBCLKS` writer - Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
803pub struct ENAUTOSET_USBCLKS_W<'a> {
804    w: &'a mut W,
805}
806impl<'a> ENAUTOSET_USBCLKS_W<'a> {
807    #[doc = r"Sets the field bit"]
808    #[inline(always)]
809    pub fn set_bit(self) -> &'a mut W {
810        self.bit(true)
811    }
812    #[doc = r"Clears the field bit"]
813    #[inline(always)]
814    pub fn clear_bit(self) -> &'a mut W {
815        self.bit(false)
816    }
817    #[doc = r"Writes raw bits to the field"]
818    #[inline(always)]
819    pub fn bit(self, value: bool) -> &'a mut W {
820        self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
821        self.w
822    }
823}
824#[doc = "Field `HOST_FORCE_LS_SE0` reader - Forces the next FS packet that is transmitted to have a EOP with low-speed timing"]
825pub struct HOST_FORCE_LS_SE0_R(crate::FieldReader<bool, bool>);
826impl HOST_FORCE_LS_SE0_R {
827    #[inline(always)]
828    pub(crate) fn new(bits: bool) -> Self {
829        HOST_FORCE_LS_SE0_R(crate::FieldReader::new(bits))
830    }
831}
832impl core::ops::Deref for HOST_FORCE_LS_SE0_R {
833    type Target = crate::FieldReader<bool, bool>;
834    #[inline(always)]
835    fn deref(&self) -> &Self::Target {
836        &self.0
837    }
838}
839#[doc = "Field `HOST_FORCE_LS_SE0` writer - Forces the next FS packet that is transmitted to have a EOP with low-speed timing"]
840pub struct HOST_FORCE_LS_SE0_W<'a> {
841    w: &'a mut W,
842}
843impl<'a> HOST_FORCE_LS_SE0_W<'a> {
844    #[doc = r"Sets the field bit"]
845    #[inline(always)]
846    pub fn set_bit(self) -> &'a mut W {
847        self.bit(true)
848    }
849    #[doc = r"Clears the field bit"]
850    #[inline(always)]
851    pub fn clear_bit(self) -> &'a mut W {
852        self.bit(false)
853    }
854    #[doc = r"Writes raw bits to the field"]
855    #[inline(always)]
856    pub fn bit(self, value: bool) -> &'a mut W {
857        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
858        self.w
859    }
860}
861#[doc = "Field `UTMI_SUSPENDM` reader - Used by the PHY to indicate a powered-down state"]
862pub struct UTMI_SUSPENDM_R(crate::FieldReader<bool, bool>);
863impl UTMI_SUSPENDM_R {
864    #[inline(always)]
865    pub(crate) fn new(bits: bool) -> Self {
866        UTMI_SUSPENDM_R(crate::FieldReader::new(bits))
867    }
868}
869impl core::ops::Deref for UTMI_SUSPENDM_R {
870    type Target = crate::FieldReader<bool, bool>;
871    #[inline(always)]
872    fn deref(&self) -> &Self::Target {
873        &self.0
874    }
875}
876#[doc = "Field `CLKGATE` reader - Gate UTMI Clocks"]
877pub struct CLKGATE_R(crate::FieldReader<bool, bool>);
878impl CLKGATE_R {
879    #[inline(always)]
880    pub(crate) fn new(bits: bool) -> Self {
881        CLKGATE_R(crate::FieldReader::new(bits))
882    }
883}
884impl core::ops::Deref for CLKGATE_R {
885    type Target = crate::FieldReader<bool, bool>;
886    #[inline(always)]
887    fn deref(&self) -> &Self::Target {
888        &self.0
889    }
890}
891#[doc = "Field `CLKGATE` writer - Gate UTMI Clocks"]
892pub struct CLKGATE_W<'a> {
893    w: &'a mut W,
894}
895impl<'a> CLKGATE_W<'a> {
896    #[doc = r"Sets the field bit"]
897    #[inline(always)]
898    pub fn set_bit(self) -> &'a mut W {
899        self.bit(true)
900    }
901    #[doc = r"Clears the field bit"]
902    #[inline(always)]
903    pub fn clear_bit(self) -> &'a mut W {
904        self.bit(false)
905    }
906    #[doc = r"Writes raw bits to the field"]
907    #[inline(always)]
908    pub fn bit(self, value: bool) -> &'a mut W {
909        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
910        self.w
911    }
912}
913#[doc = "Field `SFTRST` reader - Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers"]
914pub struct SFTRST_R(crate::FieldReader<bool, bool>);
915impl SFTRST_R {
916    #[inline(always)]
917    pub(crate) fn new(bits: bool) -> Self {
918        SFTRST_R(crate::FieldReader::new(bits))
919    }
920}
921impl core::ops::Deref for SFTRST_R {
922    type Target = crate::FieldReader<bool, bool>;
923    #[inline(always)]
924    fn deref(&self) -> &Self::Target {
925        &self.0
926    }
927}
928#[doc = "Field `SFTRST` writer - Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers"]
929pub struct SFTRST_W<'a> {
930    w: &'a mut W,
931}
932impl<'a> SFTRST_W<'a> {
933    #[doc = r"Sets the field bit"]
934    #[inline(always)]
935    pub fn set_bit(self) -> &'a mut W {
936        self.bit(true)
937    }
938    #[doc = r"Clears the field bit"]
939    #[inline(always)]
940    pub fn clear_bit(self) -> &'a mut W {
941        self.bit(false)
942    }
943    #[doc = r"Writes raw bits to the field"]
944    #[inline(always)]
945    pub fn bit(self, value: bool) -> &'a mut W {
946        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
947        self.w
948    }
949}
950impl R {
951    #[doc = "Bit 1 - For host mode, enables high-speed disconnect detector"]
952    #[inline(always)]
953    pub fn enhostdiscondetect(&self) -> ENHOSTDISCONDETECT_R {
954        ENHOSTDISCONDETECT_R::new(((self.bits >> 1) & 0x01) != 0)
955    }
956    #[doc = "Bit 2 - Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode"]
957    #[inline(always)]
958    pub fn enirqhostdiscon(&self) -> ENIRQHOSTDISCON_R {
959        ENIRQHOSTDISCON_R::new(((self.bits >> 2) & 0x01) != 0)
960    }
961    #[doc = "Bit 3 - Indicates that the device has disconnected in High-Speed mode"]
962    #[inline(always)]
963    pub fn hostdiscondetect_irq(&self) -> HOSTDISCONDETECT_IRQ_R {
964        HOSTDISCONDETECT_IRQ_R::new(((self.bits >> 3) & 0x01) != 0)
965    }
966    #[doc = "Bit 4 - Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode"]
967    #[inline(always)]
968    pub fn endevplugindet(&self) -> ENDEVPLUGINDET_R {
969        ENDEVPLUGINDET_R::new(((self.bits >> 4) & 0x01) != 0)
970    }
971    #[doc = "Bit 5 - Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in"]
972    #[inline(always)]
973    pub fn devplugin_polarity(&self) -> DEVPLUGIN_POLARITY_R {
974        DEVPLUGIN_POLARITY_R::new(((self.bits >> 5) & 0x01) != 0)
975    }
976    #[doc = "Bit 8 - Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it"]
977    #[inline(always)]
978    pub fn resumeirqsticky(&self) -> RESUMEIRQSTICKY_R {
979        RESUMEIRQSTICKY_R::new(((self.bits >> 8) & 0x01) != 0)
980    }
981    #[doc = "Bit 9 - Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line"]
982    #[inline(always)]
983    pub fn enirqresumedetect(&self) -> ENIRQRESUMEDETECT_R {
984        ENIRQRESUMEDETECT_R::new(((self.bits >> 9) & 0x01) != 0)
985    }
986    #[doc = "Bit 10 - Resume IRQ: Indicates that the host is sending a wake-up after suspend"]
987    #[inline(always)]
988    pub fn resume_irq(&self) -> RESUME_IRQ_R {
989        RESUME_IRQ_R::new(((self.bits >> 10) & 0x01) != 0)
990    }
991    #[doc = "Bit 12 - Indicates that the device is connected"]
992    #[inline(always)]
993    pub fn devplugin_irq(&self) -> DEVPLUGIN_IRQ_R {
994        DEVPLUGIN_IRQ_R::new(((self.bits >> 12) & 0x01) != 0)
995    }
996    #[doc = "Bit 14 - Enables UTMI+ Level 2 operation for the USB HS PHY"]
997    #[inline(always)]
998    pub fn enutmilevel2(&self) -> ENUTMILEVEL2_R {
999        ENUTMILEVEL2_R::new(((self.bits >> 14) & 0x01) != 0)
1000    }
1001    #[doc = "Bit 15 - Enables UTMI+ Level 3 operation for the USB HS PHY"]
1002    #[inline(always)]
1003    pub fn enutmilevel3(&self) -> ENUTMILEVEL3_R {
1004        ENUTMILEVEL3_R::new(((self.bits >> 15) & 0x01) != 0)
1005    }
1006    #[doc = "Bit 16 - Enable wake-up IRQ: Enables interrupt for the wake-up events."]
1007    #[inline(always)]
1008    pub fn enirqwakeup(&self) -> ENIRQWAKEUP_R {
1009        ENIRQWAKEUP_R::new(((self.bits >> 16) & 0x01) != 0)
1010    }
1011    #[doc = "Bit 17 - Wake-up IRQ: Indicates that there is a wak-eup event"]
1012    #[inline(always)]
1013    pub fn wakeup_irq(&self) -> WAKEUP_IRQ_R {
1014        WAKEUP_IRQ_R::new(((self.bits >> 17) & 0x01) != 0)
1015    }
1016    #[doc = "Bit 18 - Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)"]
1017    #[inline(always)]
1018    pub fn autoresume_en(&self) -> AUTORESUME_EN_R {
1019        AUTORESUME_EN_R::new(((self.bits >> 18) & 0x01) != 0)
1020    }
1021    #[doc = "Bit 19 - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended"]
1022    #[inline(always)]
1023    pub fn enautoclr_clkgate(&self) -> ENAUTOCLR_CLKGATE_R {
1024        ENAUTOCLR_CLKGATE_R::new(((self.bits >> 19) & 0x01) != 0)
1025    }
1026    #[doc = "Bit 20 - Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended"]
1027    #[inline(always)]
1028    pub fn enautoclr_phy_pwd(&self) -> ENAUTOCLR_PHY_PWD_R {
1029        ENAUTOCLR_PHY_PWD_R::new(((self.bits >> 20) & 0x01) != 0)
1030    }
1031    #[doc = "Bit 21 - Enable DP DM change wake-up: Not for customer use"]
1032    #[inline(always)]
1033    pub fn endpdmchg_wkup(&self) -> ENDPDMCHG_WKUP_R {
1034        ENDPDMCHG_WKUP_R::new(((self.bits >> 21) & 0x01) != 0)
1035    }
1036    #[doc = "Bit 23 - Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended"]
1037    #[inline(always)]
1038    pub fn envbuschg_wkup(&self) -> ENVBUSCHG_WKUP_R {
1039        ENVBUSCHG_WKUP_R::new(((self.bits >> 23) & 0x01) != 0)
1040    }
1041    #[doc = "Bit 25 - Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
1042    #[inline(always)]
1043    pub fn enautoclr_usbclkgate(&self) -> ENAUTOCLR_USBCLKGATE_R {
1044        ENAUTOCLR_USBCLKGATE_R::new(((self.bits >> 25) & 0x01) != 0)
1045    }
1046    #[doc = "Bit 26 - Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
1047    #[inline(always)]
1048    pub fn enautoset_usbclks(&self) -> ENAUTOSET_USBCLKS_R {
1049        ENAUTOSET_USBCLKS_R::new(((self.bits >> 26) & 0x01) != 0)
1050    }
1051    #[doc = "Bit 28 - Forces the next FS packet that is transmitted to have a EOP with low-speed timing"]
1052    #[inline(always)]
1053    pub fn host_force_ls_se0(&self) -> HOST_FORCE_LS_SE0_R {
1054        HOST_FORCE_LS_SE0_R::new(((self.bits >> 28) & 0x01) != 0)
1055    }
1056    #[doc = "Bit 29 - Used by the PHY to indicate a powered-down state"]
1057    #[inline(always)]
1058    pub fn utmi_suspendm(&self) -> UTMI_SUSPENDM_R {
1059        UTMI_SUSPENDM_R::new(((self.bits >> 29) & 0x01) != 0)
1060    }
1061    #[doc = "Bit 30 - Gate UTMI Clocks"]
1062    #[inline(always)]
1063    pub fn clkgate(&self) -> CLKGATE_R {
1064        CLKGATE_R::new(((self.bits >> 30) & 0x01) != 0)
1065    }
1066    #[doc = "Bit 31 - Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers"]
1067    #[inline(always)]
1068    pub fn sftrst(&self) -> SFTRST_R {
1069        SFTRST_R::new(((self.bits >> 31) & 0x01) != 0)
1070    }
1071}
1072impl W {
1073    #[doc = "Bit 1 - For host mode, enables high-speed disconnect detector"]
1074    #[inline(always)]
1075    pub fn enhostdiscondetect(&mut self) -> ENHOSTDISCONDETECT_W {
1076        ENHOSTDISCONDETECT_W { w: self }
1077    }
1078    #[doc = "Bit 2 - Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode"]
1079    #[inline(always)]
1080    pub fn enirqhostdiscon(&mut self) -> ENIRQHOSTDISCON_W {
1081        ENIRQHOSTDISCON_W { w: self }
1082    }
1083    #[doc = "Bit 3 - Indicates that the device has disconnected in High-Speed mode"]
1084    #[inline(always)]
1085    pub fn hostdiscondetect_irq(&mut self) -> HOSTDISCONDETECT_IRQ_W {
1086        HOSTDISCONDETECT_IRQ_W { w: self }
1087    }
1088    #[doc = "Bit 4 - Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode"]
1089    #[inline(always)]
1090    pub fn endevplugindet(&mut self) -> ENDEVPLUGINDET_W {
1091        ENDEVPLUGINDET_W { w: self }
1092    }
1093    #[doc = "Bit 5 - Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in"]
1094    #[inline(always)]
1095    pub fn devplugin_polarity(&mut self) -> DEVPLUGIN_POLARITY_W {
1096        DEVPLUGIN_POLARITY_W { w: self }
1097    }
1098    #[doc = "Bit 8 - Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it"]
1099    #[inline(always)]
1100    pub fn resumeirqsticky(&mut self) -> RESUMEIRQSTICKY_W {
1101        RESUMEIRQSTICKY_W { w: self }
1102    }
1103    #[doc = "Bit 9 - Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line"]
1104    #[inline(always)]
1105    pub fn enirqresumedetect(&mut self) -> ENIRQRESUMEDETECT_W {
1106        ENIRQRESUMEDETECT_W { w: self }
1107    }
1108    #[doc = "Bit 10 - Resume IRQ: Indicates that the host is sending a wake-up after suspend"]
1109    #[inline(always)]
1110    pub fn resume_irq(&mut self) -> RESUME_IRQ_W {
1111        RESUME_IRQ_W { w: self }
1112    }
1113    #[doc = "Bit 12 - Indicates that the device is connected"]
1114    #[inline(always)]
1115    pub fn devplugin_irq(&mut self) -> DEVPLUGIN_IRQ_W {
1116        DEVPLUGIN_IRQ_W { w: self }
1117    }
1118    #[doc = "Bit 14 - Enables UTMI+ Level 2 operation for the USB HS PHY"]
1119    #[inline(always)]
1120    pub fn enutmilevel2(&mut self) -> ENUTMILEVEL2_W {
1121        ENUTMILEVEL2_W { w: self }
1122    }
1123    #[doc = "Bit 15 - Enables UTMI+ Level 3 operation for the USB HS PHY"]
1124    #[inline(always)]
1125    pub fn enutmilevel3(&mut self) -> ENUTMILEVEL3_W {
1126        ENUTMILEVEL3_W { w: self }
1127    }
1128    #[doc = "Bit 16 - Enable wake-up IRQ: Enables interrupt for the wake-up events."]
1129    #[inline(always)]
1130    pub fn enirqwakeup(&mut self) -> ENIRQWAKEUP_W {
1131        ENIRQWAKEUP_W { w: self }
1132    }
1133    #[doc = "Bit 17 - Wake-up IRQ: Indicates that there is a wak-eup event"]
1134    #[inline(always)]
1135    pub fn wakeup_irq(&mut self) -> WAKEUP_IRQ_W {
1136        WAKEUP_IRQ_W { w: self }
1137    }
1138    #[doc = "Bit 18 - Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)"]
1139    #[inline(always)]
1140    pub fn autoresume_en(&mut self) -> AUTORESUME_EN_W {
1141        AUTORESUME_EN_W { w: self }
1142    }
1143    #[doc = "Bit 19 - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended"]
1144    #[inline(always)]
1145    pub fn enautoclr_clkgate(&mut self) -> ENAUTOCLR_CLKGATE_W {
1146        ENAUTOCLR_CLKGATE_W { w: self }
1147    }
1148    #[doc = "Bit 20 - Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended"]
1149    #[inline(always)]
1150    pub fn enautoclr_phy_pwd(&mut self) -> ENAUTOCLR_PHY_PWD_W {
1151        ENAUTOCLR_PHY_PWD_W { w: self }
1152    }
1153    #[doc = "Bit 21 - Enable DP DM change wake-up: Not for customer use"]
1154    #[inline(always)]
1155    pub fn endpdmchg_wkup(&mut self) -> ENDPDMCHG_WKUP_W {
1156        ENDPDMCHG_WKUP_W { w: self }
1157    }
1158    #[doc = "Bit 23 - Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended"]
1159    #[inline(always)]
1160    pub fn envbuschg_wkup(&mut self) -> ENVBUSCHG_WKUP_W {
1161        ENVBUSCHG_WKUP_W { w: self }
1162    }
1163    #[doc = "Bit 25 - Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
1164    #[inline(always)]
1165    pub fn enautoclr_usbclkgate(&mut self) -> ENAUTOCLR_USBCLKGATE_W {
1166        ENAUTOCLR_USBCLKGATE_W { w: self }
1167    }
1168    #[doc = "Bit 26 - Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended"]
1169    #[inline(always)]
1170    pub fn enautoset_usbclks(&mut self) -> ENAUTOSET_USBCLKS_W {
1171        ENAUTOSET_USBCLKS_W { w: self }
1172    }
1173    #[doc = "Bit 28 - Forces the next FS packet that is transmitted to have a EOP with low-speed timing"]
1174    #[inline(always)]
1175    pub fn host_force_ls_se0(&mut self) -> HOST_FORCE_LS_SE0_W {
1176        HOST_FORCE_LS_SE0_W { w: self }
1177    }
1178    #[doc = "Bit 30 - Gate UTMI Clocks"]
1179    #[inline(always)]
1180    pub fn clkgate(&mut self) -> CLKGATE_W {
1181        CLKGATE_W { w: self }
1182    }
1183    #[doc = "Bit 31 - Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers"]
1184    #[inline(always)]
1185    pub fn sftrst(&mut self) -> SFTRST_W {
1186        SFTRST_W { w: self }
1187    }
1188    #[doc = "Writes raw bits to the register."]
1189    #[inline(always)]
1190    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1191        self.0.bits(bits);
1192        self
1193    }
1194}
1195#[doc = "USB PHY General Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl_set](index.html) module"]
1196pub struct CTRL_SET_SPEC;
1197impl crate::RegisterSpec for CTRL_SET_SPEC {
1198    type Ux = u32;
1199}
1200#[doc = "`read()` method returns [ctrl_set::R](R) reader structure"]
1201impl crate::Readable for CTRL_SET_SPEC {
1202    type Reader = R;
1203}
1204#[doc = "`write(|w| ..)` method takes [ctrl_set::W](W) writer structure"]
1205impl crate::Writable for CTRL_SET_SPEC {
1206    type Writer = W;
1207}
1208#[doc = "`reset()` method sets CTRL_SET to value 0xc000_0000"]
1209impl crate::Resettable for CTRL_SET_SPEC {
1210    #[inline(always)]
1211    fn reset_value() -> Self::Ux {
1212        0xc000_0000
1213    }
1214}
lpc55_pac/usbphy/ctrl_set.rs

lpc55_pac/usbphy/
ctrl_set.rs
