lpc55_pac/sysctl/
sharedctrlset.rs

1#[doc = "Register `SHAREDCTRLSET%s` reader"]
2pub struct R(crate::R<SHAREDCTRLSET_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SHAREDCTRLSET_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SHAREDCTRLSET_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SHAREDCTRLSET_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SHAREDCTRLSET%s` writer"]
17pub struct W(crate::W<SHAREDCTRLSET_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SHAREDCTRLSET_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SHAREDCTRLSET_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SHAREDCTRLSET_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Selects the source for SCK of this shared signal set.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum SHAREDSCKSEL_A {
41    #[doc = "0: SCK for this shared signal set comes from Flexcomm 0."]
42    FLEXCOMM0 = 0,
43    #[doc = "1: SCK for this shared signal set comes from Flexcomm 1."]
44    FLEXCOMM1 = 1,
45    #[doc = "2: SCK for this shared signal set comes from Flexcomm 2."]
46    FLEXCOMM2 = 2,
47    #[doc = "3: SCK for this shared signal set comes from Flexcomm 3."]
48    FLEXCOMM3 = 3,
49    #[doc = "4: SCK for this shared signal set comes from Flexcomm 4."]
50    FLEXCOMM4 = 4,
51    #[doc = "5: SCK for this shared signal set comes from Flexcomm 5."]
52    FLEXCOMM5 = 5,
53    #[doc = "6: SCK for this shared signal set comes from Flexcomm 6."]
54    FLEXCOMM6 = 6,
55    #[doc = "7: SCK for this shared signal set comes from Flexcomm 7."]
56    FLEXCOMM7 = 7,
57}
58impl From<SHAREDSCKSEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: SHAREDSCKSEL_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `SHAREDSCKSEL` reader - Selects the source for SCK of this shared signal set."]
65pub struct SHAREDSCKSEL_R(crate::FieldReader<u8, SHAREDSCKSEL_A>);
66impl SHAREDSCKSEL_R {
67    #[inline(always)]
68    pub(crate) fn new(bits: u8) -> Self {
69        SHAREDSCKSEL_R(crate::FieldReader::new(bits))
70    }
71    #[doc = r"Get enumerated values variant"]
72    #[inline(always)]
73    pub fn variant(&self) -> SHAREDSCKSEL_A {
74        match self.bits {
75            0 => SHAREDSCKSEL_A::FLEXCOMM0,
76            1 => SHAREDSCKSEL_A::FLEXCOMM1,
77            2 => SHAREDSCKSEL_A::FLEXCOMM2,
78            3 => SHAREDSCKSEL_A::FLEXCOMM3,
79            4 => SHAREDSCKSEL_A::FLEXCOMM4,
80            5 => SHAREDSCKSEL_A::FLEXCOMM5,
81            6 => SHAREDSCKSEL_A::FLEXCOMM6,
82            7 => SHAREDSCKSEL_A::FLEXCOMM7,
83            _ => unreachable!(),
84        }
85    }
86    #[doc = "Checks if the value of the field is `FLEXCOMM0`"]
87    #[inline(always)]
88    pub fn is_flexcomm0(&self) -> bool {
89        **self == SHAREDSCKSEL_A::FLEXCOMM0
90    }
91    #[doc = "Checks if the value of the field is `FLEXCOMM1`"]
92    #[inline(always)]
93    pub fn is_flexcomm1(&self) -> bool {
94        **self == SHAREDSCKSEL_A::FLEXCOMM1
95    }
96    #[doc = "Checks if the value of the field is `FLEXCOMM2`"]
97    #[inline(always)]
98    pub fn is_flexcomm2(&self) -> bool {
99        **self == SHAREDSCKSEL_A::FLEXCOMM2
100    }
101    #[doc = "Checks if the value of the field is `FLEXCOMM3`"]
102    #[inline(always)]
103    pub fn is_flexcomm3(&self) -> bool {
104        **self == SHAREDSCKSEL_A::FLEXCOMM3
105    }
106    #[doc = "Checks if the value of the field is `FLEXCOMM4`"]
107    #[inline(always)]
108    pub fn is_flexcomm4(&self) -> bool {
109        **self == SHAREDSCKSEL_A::FLEXCOMM4
110    }
111    #[doc = "Checks if the value of the field is `FLEXCOMM5`"]
112    #[inline(always)]
113    pub fn is_flexcomm5(&self) -> bool {
114        **self == SHAREDSCKSEL_A::FLEXCOMM5
115    }
116    #[doc = "Checks if the value of the field is `FLEXCOMM6`"]
117    #[inline(always)]
118    pub fn is_flexcomm6(&self) -> bool {
119        **self == SHAREDSCKSEL_A::FLEXCOMM6
120    }
121    #[doc = "Checks if the value of the field is `FLEXCOMM7`"]
122    #[inline(always)]
123    pub fn is_flexcomm7(&self) -> bool {
124        **self == SHAREDSCKSEL_A::FLEXCOMM7
125    }
126}
127impl core::ops::Deref for SHAREDSCKSEL_R {
128    type Target = crate::FieldReader<u8, SHAREDSCKSEL_A>;
129    #[inline(always)]
130    fn deref(&self) -> &Self::Target {
131        &self.0
132    }
133}
134#[doc = "Field `SHAREDSCKSEL` writer - Selects the source for SCK of this shared signal set."]
135pub struct SHAREDSCKSEL_W<'a> {
136    w: &'a mut W,
137}
138impl<'a> SHAREDSCKSEL_W<'a> {
139    #[doc = r"Writes `variant` to the field"]
140    #[inline(always)]
141    pub fn variant(self, variant: SHAREDSCKSEL_A) -> &'a mut W {
142        self.bits(variant.into())
143    }
144    #[doc = "SCK for this shared signal set comes from Flexcomm 0."]
145    #[inline(always)]
146    pub fn flexcomm0(self) -> &'a mut W {
147        self.variant(SHAREDSCKSEL_A::FLEXCOMM0)
148    }
149    #[doc = "SCK for this shared signal set comes from Flexcomm 1."]
150    #[inline(always)]
151    pub fn flexcomm1(self) -> &'a mut W {
152        self.variant(SHAREDSCKSEL_A::FLEXCOMM1)
153    }
154    #[doc = "SCK for this shared signal set comes from Flexcomm 2."]
155    #[inline(always)]
156    pub fn flexcomm2(self) -> &'a mut W {
157        self.variant(SHAREDSCKSEL_A::FLEXCOMM2)
158    }
159    #[doc = "SCK for this shared signal set comes from Flexcomm 3."]
160    #[inline(always)]
161    pub fn flexcomm3(self) -> &'a mut W {
162        self.variant(SHAREDSCKSEL_A::FLEXCOMM3)
163    }
164    #[doc = "SCK for this shared signal set comes from Flexcomm 4."]
165    #[inline(always)]
166    pub fn flexcomm4(self) -> &'a mut W {
167        self.variant(SHAREDSCKSEL_A::FLEXCOMM4)
168    }
169    #[doc = "SCK for this shared signal set comes from Flexcomm 5."]
170    #[inline(always)]
171    pub fn flexcomm5(self) -> &'a mut W {
172        self.variant(SHAREDSCKSEL_A::FLEXCOMM5)
173    }
174    #[doc = "SCK for this shared signal set comes from Flexcomm 6."]
175    #[inline(always)]
176    pub fn flexcomm6(self) -> &'a mut W {
177        self.variant(SHAREDSCKSEL_A::FLEXCOMM6)
178    }
179    #[doc = "SCK for this shared signal set comes from Flexcomm 7."]
180    #[inline(always)]
181    pub fn flexcomm7(self) -> &'a mut W {
182        self.variant(SHAREDSCKSEL_A::FLEXCOMM7)
183    }
184    #[doc = r"Writes raw bits to the field"]
185    #[inline(always)]
186    pub fn bits(self, value: u8) -> &'a mut W {
187        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
188        self.w
189    }
190}
191#[doc = "Selects the source for WS of this shared signal set.\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq)]
193#[repr(u8)]
194pub enum SHAREDWSSEL_A {
195    #[doc = "0: WS for this shared signal set comes from Flexcomm 0."]
196    FLEXCOMM0 = 0,
197    #[doc = "1: WS for this shared signal set comes from Flexcomm 1."]
198    FLEXCOMM1 = 1,
199    #[doc = "2: WS for this shared signal set comes from Flexcomm 2."]
200    FLEXCOMM2 = 2,
201    #[doc = "3: WS for this shared signal set comes from Flexcomm 3."]
202    FLEXCOMM3 = 3,
203    #[doc = "4: WS for this shared signal set comes from Flexcomm 4."]
204    FLEXCOMM4 = 4,
205    #[doc = "5: WS for this shared signal set comes from Flexcomm 5."]
206    FLEXCOMM5 = 5,
207    #[doc = "6: WS for this shared signal set comes from Flexcomm 6."]
208    FLEXCOMM6 = 6,
209    #[doc = "7: WS for this shared signal set comes from Flexcomm 7."]
210    FLEXCOMM7 = 7,
211}
212impl From<SHAREDWSSEL_A> for u8 {
213    #[inline(always)]
214    fn from(variant: SHAREDWSSEL_A) -> Self {
215        variant as _
216    }
217}
218#[doc = "Field `SHAREDWSSEL` reader - Selects the source for WS of this shared signal set."]
219pub struct SHAREDWSSEL_R(crate::FieldReader<u8, SHAREDWSSEL_A>);
220impl SHAREDWSSEL_R {
221    #[inline(always)]
222    pub(crate) fn new(bits: u8) -> Self {
223        SHAREDWSSEL_R(crate::FieldReader::new(bits))
224    }
225    #[doc = r"Get enumerated values variant"]
226    #[inline(always)]
227    pub fn variant(&self) -> SHAREDWSSEL_A {
228        match self.bits {
229            0 => SHAREDWSSEL_A::FLEXCOMM0,
230            1 => SHAREDWSSEL_A::FLEXCOMM1,
231            2 => SHAREDWSSEL_A::FLEXCOMM2,
232            3 => SHAREDWSSEL_A::FLEXCOMM3,
233            4 => SHAREDWSSEL_A::FLEXCOMM4,
234            5 => SHAREDWSSEL_A::FLEXCOMM5,
235            6 => SHAREDWSSEL_A::FLEXCOMM6,
236            7 => SHAREDWSSEL_A::FLEXCOMM7,
237            _ => unreachable!(),
238        }
239    }
240    #[doc = "Checks if the value of the field is `FLEXCOMM0`"]
241    #[inline(always)]
242    pub fn is_flexcomm0(&self) -> bool {
243        **self == SHAREDWSSEL_A::FLEXCOMM0
244    }
245    #[doc = "Checks if the value of the field is `FLEXCOMM1`"]
246    #[inline(always)]
247    pub fn is_flexcomm1(&self) -> bool {
248        **self == SHAREDWSSEL_A::FLEXCOMM1
249    }
250    #[doc = "Checks if the value of the field is `FLEXCOMM2`"]
251    #[inline(always)]
252    pub fn is_flexcomm2(&self) -> bool {
253        **self == SHAREDWSSEL_A::FLEXCOMM2
254    }
255    #[doc = "Checks if the value of the field is `FLEXCOMM3`"]
256    #[inline(always)]
257    pub fn is_flexcomm3(&self) -> bool {
258        **self == SHAREDWSSEL_A::FLEXCOMM3
259    }
260    #[doc = "Checks if the value of the field is `FLEXCOMM4`"]
261    #[inline(always)]
262    pub fn is_flexcomm4(&self) -> bool {
263        **self == SHAREDWSSEL_A::FLEXCOMM4
264    }
265    #[doc = "Checks if the value of the field is `FLEXCOMM5`"]
266    #[inline(always)]
267    pub fn is_flexcomm5(&self) -> bool {
268        **self == SHAREDWSSEL_A::FLEXCOMM5
269    }
270    #[doc = "Checks if the value of the field is `FLEXCOMM6`"]
271    #[inline(always)]
272    pub fn is_flexcomm6(&self) -> bool {
273        **self == SHAREDWSSEL_A::FLEXCOMM6
274    }
275    #[doc = "Checks if the value of the field is `FLEXCOMM7`"]
276    #[inline(always)]
277    pub fn is_flexcomm7(&self) -> bool {
278        **self == SHAREDWSSEL_A::FLEXCOMM7
279    }
280}
281impl core::ops::Deref for SHAREDWSSEL_R {
282    type Target = crate::FieldReader<u8, SHAREDWSSEL_A>;
283    #[inline(always)]
284    fn deref(&self) -> &Self::Target {
285        &self.0
286    }
287}
288#[doc = "Field `SHAREDWSSEL` writer - Selects the source for WS of this shared signal set."]
289pub struct SHAREDWSSEL_W<'a> {
290    w: &'a mut W,
291}
292impl<'a> SHAREDWSSEL_W<'a> {
293    #[doc = r"Writes `variant` to the field"]
294    #[inline(always)]
295    pub fn variant(self, variant: SHAREDWSSEL_A) -> &'a mut W {
296        self.bits(variant.into())
297    }
298    #[doc = "WS for this shared signal set comes from Flexcomm 0."]
299    #[inline(always)]
300    pub fn flexcomm0(self) -> &'a mut W {
301        self.variant(SHAREDWSSEL_A::FLEXCOMM0)
302    }
303    #[doc = "WS for this shared signal set comes from Flexcomm 1."]
304    #[inline(always)]
305    pub fn flexcomm1(self) -> &'a mut W {
306        self.variant(SHAREDWSSEL_A::FLEXCOMM1)
307    }
308    #[doc = "WS for this shared signal set comes from Flexcomm 2."]
309    #[inline(always)]
310    pub fn flexcomm2(self) -> &'a mut W {
311        self.variant(SHAREDWSSEL_A::FLEXCOMM2)
312    }
313    #[doc = "WS for this shared signal set comes from Flexcomm 3."]
314    #[inline(always)]
315    pub fn flexcomm3(self) -> &'a mut W {
316        self.variant(SHAREDWSSEL_A::FLEXCOMM3)
317    }
318    #[doc = "WS for this shared signal set comes from Flexcomm 4."]
319    #[inline(always)]
320    pub fn flexcomm4(self) -> &'a mut W {
321        self.variant(SHAREDWSSEL_A::FLEXCOMM4)
322    }
323    #[doc = "WS for this shared signal set comes from Flexcomm 5."]
324    #[inline(always)]
325    pub fn flexcomm5(self) -> &'a mut W {
326        self.variant(SHAREDWSSEL_A::FLEXCOMM5)
327    }
328    #[doc = "WS for this shared signal set comes from Flexcomm 6."]
329    #[inline(always)]
330    pub fn flexcomm6(self) -> &'a mut W {
331        self.variant(SHAREDWSSEL_A::FLEXCOMM6)
332    }
333    #[doc = "WS for this shared signal set comes from Flexcomm 7."]
334    #[inline(always)]
335    pub fn flexcomm7(self) -> &'a mut W {
336        self.variant(SHAREDWSSEL_A::FLEXCOMM7)
337    }
338    #[doc = r"Writes raw bits to the field"]
339    #[inline(always)]
340    pub fn bits(self, value: u8) -> &'a mut W {
341        self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4);
342        self.w
343    }
344}
345#[doc = "Selects the source for DATA input for this shared signal set.\n\nValue on reset: 0"]
346#[derive(Clone, Copy, Debug, PartialEq)]
347#[repr(u8)]
348pub enum SHAREDDATASEL_A {
349    #[doc = "0: DATA input for this shared signal set comes from Flexcomm 0."]
350    FLEXCOMM0 = 0,
351    #[doc = "1: DATA input for this shared signal set comes from Flexcomm 1."]
352    FLEXCOMM1 = 1,
353    #[doc = "2: DATA input for this shared signal set comes from Flexcomm 2."]
354    FLEXCOMM2 = 2,
355    #[doc = "3: DATA input for this shared signal set comes from Flexcomm 3."]
356    FLEXCOMM3 = 3,
357    #[doc = "4: DATA input for this shared signal set comes from Flexcomm 4."]
358    FLEXCOMM4 = 4,
359    #[doc = "5: DATA input for this shared signal set comes from Flexcomm 5."]
360    FLEXCOMM5 = 5,
361    #[doc = "6: DATA input for this shared signal set comes from Flexcomm 6."]
362    FLEXCOMM6 = 6,
363    #[doc = "7: DATA input for this shared signal set comes from Flexcomm 7."]
364    FLEXCOMM7 = 7,
365}
366impl From<SHAREDDATASEL_A> for u8 {
367    #[inline(always)]
368    fn from(variant: SHAREDDATASEL_A) -> Self {
369        variant as _
370    }
371}
372#[doc = "Field `SHAREDDATASEL` reader - Selects the source for DATA input for this shared signal set."]
373pub struct SHAREDDATASEL_R(crate::FieldReader<u8, SHAREDDATASEL_A>);
374impl SHAREDDATASEL_R {
375    #[inline(always)]
376    pub(crate) fn new(bits: u8) -> Self {
377        SHAREDDATASEL_R(crate::FieldReader::new(bits))
378    }
379    #[doc = r"Get enumerated values variant"]
380    #[inline(always)]
381    pub fn variant(&self) -> SHAREDDATASEL_A {
382        match self.bits {
383            0 => SHAREDDATASEL_A::FLEXCOMM0,
384            1 => SHAREDDATASEL_A::FLEXCOMM1,
385            2 => SHAREDDATASEL_A::FLEXCOMM2,
386            3 => SHAREDDATASEL_A::FLEXCOMM3,
387            4 => SHAREDDATASEL_A::FLEXCOMM4,
388            5 => SHAREDDATASEL_A::FLEXCOMM5,
389            6 => SHAREDDATASEL_A::FLEXCOMM6,
390            7 => SHAREDDATASEL_A::FLEXCOMM7,
391            _ => unreachable!(),
392        }
393    }
394    #[doc = "Checks if the value of the field is `FLEXCOMM0`"]
395    #[inline(always)]
396    pub fn is_flexcomm0(&self) -> bool {
397        **self == SHAREDDATASEL_A::FLEXCOMM0
398    }
399    #[doc = "Checks if the value of the field is `FLEXCOMM1`"]
400    #[inline(always)]
401    pub fn is_flexcomm1(&self) -> bool {
402        **self == SHAREDDATASEL_A::FLEXCOMM1
403    }
404    #[doc = "Checks if the value of the field is `FLEXCOMM2`"]
405    #[inline(always)]
406    pub fn is_flexcomm2(&self) -> bool {
407        **self == SHAREDDATASEL_A::FLEXCOMM2
408    }
409    #[doc = "Checks if the value of the field is `FLEXCOMM3`"]
410    #[inline(always)]
411    pub fn is_flexcomm3(&self) -> bool {
412        **self == SHAREDDATASEL_A::FLEXCOMM3
413    }
414    #[doc = "Checks if the value of the field is `FLEXCOMM4`"]
415    #[inline(always)]
416    pub fn is_flexcomm4(&self) -> bool {
417        **self == SHAREDDATASEL_A::FLEXCOMM4
418    }
419    #[doc = "Checks if the value of the field is `FLEXCOMM5`"]
420    #[inline(always)]
421    pub fn is_flexcomm5(&self) -> bool {
422        **self == SHAREDDATASEL_A::FLEXCOMM5
423    }
424    #[doc = "Checks if the value of the field is `FLEXCOMM6`"]
425    #[inline(always)]
426    pub fn is_flexcomm6(&self) -> bool {
427        **self == SHAREDDATASEL_A::FLEXCOMM6
428    }
429    #[doc = "Checks if the value of the field is `FLEXCOMM7`"]
430    #[inline(always)]
431    pub fn is_flexcomm7(&self) -> bool {
432        **self == SHAREDDATASEL_A::FLEXCOMM7
433    }
434}
435impl core::ops::Deref for SHAREDDATASEL_R {
436    type Target = crate::FieldReader<u8, SHAREDDATASEL_A>;
437    #[inline(always)]
438    fn deref(&self) -> &Self::Target {
439        &self.0
440    }
441}
442#[doc = "Field `SHAREDDATASEL` writer - Selects the source for DATA input for this shared signal set."]
443pub struct SHAREDDATASEL_W<'a> {
444    w: &'a mut W,
445}
446impl<'a> SHAREDDATASEL_W<'a> {
447    #[doc = r"Writes `variant` to the field"]
448    #[inline(always)]
449    pub fn variant(self, variant: SHAREDDATASEL_A) -> &'a mut W {
450        self.bits(variant.into())
451    }
452    #[doc = "DATA input for this shared signal set comes from Flexcomm 0."]
453    #[inline(always)]
454    pub fn flexcomm0(self) -> &'a mut W {
455        self.variant(SHAREDDATASEL_A::FLEXCOMM0)
456    }
457    #[doc = "DATA input for this shared signal set comes from Flexcomm 1."]
458    #[inline(always)]
459    pub fn flexcomm1(self) -> &'a mut W {
460        self.variant(SHAREDDATASEL_A::FLEXCOMM1)
461    }
462    #[doc = "DATA input for this shared signal set comes from Flexcomm 2."]
463    #[inline(always)]
464    pub fn flexcomm2(self) -> &'a mut W {
465        self.variant(SHAREDDATASEL_A::FLEXCOMM2)
466    }
467    #[doc = "DATA input for this shared signal set comes from Flexcomm 3."]
468    #[inline(always)]
469    pub fn flexcomm3(self) -> &'a mut W {
470        self.variant(SHAREDDATASEL_A::FLEXCOMM3)
471    }
472    #[doc = "DATA input for this shared signal set comes from Flexcomm 4."]
473    #[inline(always)]
474    pub fn flexcomm4(self) -> &'a mut W {
475        self.variant(SHAREDDATASEL_A::FLEXCOMM4)
476    }
477    #[doc = "DATA input for this shared signal set comes from Flexcomm 5."]
478    #[inline(always)]
479    pub fn flexcomm5(self) -> &'a mut W {
480        self.variant(SHAREDDATASEL_A::FLEXCOMM5)
481    }
482    #[doc = "DATA input for this shared signal set comes from Flexcomm 6."]
483    #[inline(always)]
484    pub fn flexcomm6(self) -> &'a mut W {
485        self.variant(SHAREDDATASEL_A::FLEXCOMM6)
486    }
487    #[doc = "DATA input for this shared signal set comes from Flexcomm 7."]
488    #[inline(always)]
489    pub fn flexcomm7(self) -> &'a mut W {
490        self.variant(SHAREDDATASEL_A::FLEXCOMM7)
491    }
492    #[doc = r"Writes raw bits to the field"]
493    #[inline(always)]
494    pub fn bits(self, value: u8) -> &'a mut W {
495        self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8);
496        self.w
497    }
498}
499#[doc = "Controls FC0 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
500#[derive(Clone, Copy, Debug, PartialEq)]
501pub enum FC0DATAOUTEN_A {
502    #[doc = "0: Data output from FC0 does not contribute to this shared set."]
503    INPUT = 0,
504    #[doc = "1: Data output from FC0 does contribute to this shared set."]
505    OUTPUT = 1,
506}
507impl From<FC0DATAOUTEN_A> for bool {
508    #[inline(always)]
509    fn from(variant: FC0DATAOUTEN_A) -> Self {
510        variant as u8 != 0
511    }
512}
513#[doc = "Field `FC0DATAOUTEN` reader - Controls FC0 contribution to SHAREDDATAOUT for this shared set."]
514pub struct FC0DATAOUTEN_R(crate::FieldReader<bool, FC0DATAOUTEN_A>);
515impl FC0DATAOUTEN_R {
516    #[inline(always)]
517    pub(crate) fn new(bits: bool) -> Self {
518        FC0DATAOUTEN_R(crate::FieldReader::new(bits))
519    }
520    #[doc = r"Get enumerated values variant"]
521    #[inline(always)]
522    pub fn variant(&self) -> FC0DATAOUTEN_A {
523        match self.bits {
524            false => FC0DATAOUTEN_A::INPUT,
525            true => FC0DATAOUTEN_A::OUTPUT,
526        }
527    }
528    #[doc = "Checks if the value of the field is `INPUT`"]
529    #[inline(always)]
530    pub fn is_input(&self) -> bool {
531        **self == FC0DATAOUTEN_A::INPUT
532    }
533    #[doc = "Checks if the value of the field is `OUTPUT`"]
534    #[inline(always)]
535    pub fn is_output(&self) -> bool {
536        **self == FC0DATAOUTEN_A::OUTPUT
537    }
538}
539impl core::ops::Deref for FC0DATAOUTEN_R {
540    type Target = crate::FieldReader<bool, FC0DATAOUTEN_A>;
541    #[inline(always)]
542    fn deref(&self) -> &Self::Target {
543        &self.0
544    }
545}
546#[doc = "Field `FC0DATAOUTEN` writer - Controls FC0 contribution to SHAREDDATAOUT for this shared set."]
547pub struct FC0DATAOUTEN_W<'a> {
548    w: &'a mut W,
549}
550impl<'a> FC0DATAOUTEN_W<'a> {
551    #[doc = r"Writes `variant` to the field"]
552    #[inline(always)]
553    pub fn variant(self, variant: FC0DATAOUTEN_A) -> &'a mut W {
554        self.bit(variant.into())
555    }
556    #[doc = "Data output from FC0 does not contribute to this shared set."]
557    #[inline(always)]
558    pub fn input(self) -> &'a mut W {
559        self.variant(FC0DATAOUTEN_A::INPUT)
560    }
561    #[doc = "Data output from FC0 does contribute to this shared set."]
562    #[inline(always)]
563    pub fn output(self) -> &'a mut W {
564        self.variant(FC0DATAOUTEN_A::OUTPUT)
565    }
566    #[doc = r"Sets the field bit"]
567    #[inline(always)]
568    pub fn set_bit(self) -> &'a mut W {
569        self.bit(true)
570    }
571    #[doc = r"Clears the field bit"]
572    #[inline(always)]
573    pub fn clear_bit(self) -> &'a mut W {
574        self.bit(false)
575    }
576    #[doc = r"Writes raw bits to the field"]
577    #[inline(always)]
578    pub fn bit(self, value: bool) -> &'a mut W {
579        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
580        self.w
581    }
582}
583#[doc = "Controls FC1 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
584#[derive(Clone, Copy, Debug, PartialEq)]
585pub enum FC1DATAOUTEN_A {
586    #[doc = "0: Data output from FC1 does not contribute to this shared set."]
587    INPUT = 0,
588    #[doc = "1: Data output from FC1 does contribute to this shared set."]
589    OUTPUT = 1,
590}
591impl From<FC1DATAOUTEN_A> for bool {
592    #[inline(always)]
593    fn from(variant: FC1DATAOUTEN_A) -> Self {
594        variant as u8 != 0
595    }
596}
597#[doc = "Field `FC1DATAOUTEN` reader - Controls FC1 contribution to SHAREDDATAOUT for this shared set."]
598pub struct FC1DATAOUTEN_R(crate::FieldReader<bool, FC1DATAOUTEN_A>);
599impl FC1DATAOUTEN_R {
600    #[inline(always)]
601    pub(crate) fn new(bits: bool) -> Self {
602        FC1DATAOUTEN_R(crate::FieldReader::new(bits))
603    }
604    #[doc = r"Get enumerated values variant"]
605    #[inline(always)]
606    pub fn variant(&self) -> FC1DATAOUTEN_A {
607        match self.bits {
608            false => FC1DATAOUTEN_A::INPUT,
609            true => FC1DATAOUTEN_A::OUTPUT,
610        }
611    }
612    #[doc = "Checks if the value of the field is `INPUT`"]
613    #[inline(always)]
614    pub fn is_input(&self) -> bool {
615        **self == FC1DATAOUTEN_A::INPUT
616    }
617    #[doc = "Checks if the value of the field is `OUTPUT`"]
618    #[inline(always)]
619    pub fn is_output(&self) -> bool {
620        **self == FC1DATAOUTEN_A::OUTPUT
621    }
622}
623impl core::ops::Deref for FC1DATAOUTEN_R {
624    type Target = crate::FieldReader<bool, FC1DATAOUTEN_A>;
625    #[inline(always)]
626    fn deref(&self) -> &Self::Target {
627        &self.0
628    }
629}
630#[doc = "Field `FC1DATAOUTEN` writer - Controls FC1 contribution to SHAREDDATAOUT for this shared set."]
631pub struct FC1DATAOUTEN_W<'a> {
632    w: &'a mut W,
633}
634impl<'a> FC1DATAOUTEN_W<'a> {
635    #[doc = r"Writes `variant` to the field"]
636    #[inline(always)]
637    pub fn variant(self, variant: FC1DATAOUTEN_A) -> &'a mut W {
638        self.bit(variant.into())
639    }
640    #[doc = "Data output from FC1 does not contribute to this shared set."]
641    #[inline(always)]
642    pub fn input(self) -> &'a mut W {
643        self.variant(FC1DATAOUTEN_A::INPUT)
644    }
645    #[doc = "Data output from FC1 does contribute to this shared set."]
646    #[inline(always)]
647    pub fn output(self) -> &'a mut W {
648        self.variant(FC1DATAOUTEN_A::OUTPUT)
649    }
650    #[doc = r"Sets the field bit"]
651    #[inline(always)]
652    pub fn set_bit(self) -> &'a mut W {
653        self.bit(true)
654    }
655    #[doc = r"Clears the field bit"]
656    #[inline(always)]
657    pub fn clear_bit(self) -> &'a mut W {
658        self.bit(false)
659    }
660    #[doc = r"Writes raw bits to the field"]
661    #[inline(always)]
662    pub fn bit(self, value: bool) -> &'a mut W {
663        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
664        self.w
665    }
666}
667#[doc = "Controls FC2 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
668#[derive(Clone, Copy, Debug, PartialEq)]
669pub enum FC2DATAOUTEN_A {
670    #[doc = "0: Data output from FC2 does not contribute to this shared set."]
671    INPUT = 0,
672    #[doc = "1: Data output from FC2 does contribute to this shared set."]
673    OUTPUT = 1,
674}
675impl From<FC2DATAOUTEN_A> for bool {
676    #[inline(always)]
677    fn from(variant: FC2DATAOUTEN_A) -> Self {
678        variant as u8 != 0
679    }
680}
681#[doc = "Field `FC2DATAOUTEN` reader - Controls FC2 contribution to SHAREDDATAOUT for this shared set."]
682pub struct FC2DATAOUTEN_R(crate::FieldReader<bool, FC2DATAOUTEN_A>);
683impl FC2DATAOUTEN_R {
684    #[inline(always)]
685    pub(crate) fn new(bits: bool) -> Self {
686        FC2DATAOUTEN_R(crate::FieldReader::new(bits))
687    }
688    #[doc = r"Get enumerated values variant"]
689    #[inline(always)]
690    pub fn variant(&self) -> FC2DATAOUTEN_A {
691        match self.bits {
692            false => FC2DATAOUTEN_A::INPUT,
693            true => FC2DATAOUTEN_A::OUTPUT,
694        }
695    }
696    #[doc = "Checks if the value of the field is `INPUT`"]
697    #[inline(always)]
698    pub fn is_input(&self) -> bool {
699        **self == FC2DATAOUTEN_A::INPUT
700    }
701    #[doc = "Checks if the value of the field is `OUTPUT`"]
702    #[inline(always)]
703    pub fn is_output(&self) -> bool {
704        **self == FC2DATAOUTEN_A::OUTPUT
705    }
706}
707impl core::ops::Deref for FC2DATAOUTEN_R {
708    type Target = crate::FieldReader<bool, FC2DATAOUTEN_A>;
709    #[inline(always)]
710    fn deref(&self) -> &Self::Target {
711        &self.0
712    }
713}
714#[doc = "Field `FC2DATAOUTEN` writer - Controls FC2 contribution to SHAREDDATAOUT for this shared set."]
715pub struct FC2DATAOUTEN_W<'a> {
716    w: &'a mut W,
717}
718impl<'a> FC2DATAOUTEN_W<'a> {
719    #[doc = r"Writes `variant` to the field"]
720    #[inline(always)]
721    pub fn variant(self, variant: FC2DATAOUTEN_A) -> &'a mut W {
722        self.bit(variant.into())
723    }
724    #[doc = "Data output from FC2 does not contribute to this shared set."]
725    #[inline(always)]
726    pub fn input(self) -> &'a mut W {
727        self.variant(FC2DATAOUTEN_A::INPUT)
728    }
729    #[doc = "Data output from FC2 does contribute to this shared set."]
730    #[inline(always)]
731    pub fn output(self) -> &'a mut W {
732        self.variant(FC2DATAOUTEN_A::OUTPUT)
733    }
734    #[doc = r"Sets the field bit"]
735    #[inline(always)]
736    pub fn set_bit(self) -> &'a mut W {
737        self.bit(true)
738    }
739    #[doc = r"Clears the field bit"]
740    #[inline(always)]
741    pub fn clear_bit(self) -> &'a mut W {
742        self.bit(false)
743    }
744    #[doc = r"Writes raw bits to the field"]
745    #[inline(always)]
746    pub fn bit(self, value: bool) -> &'a mut W {
747        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
748        self.w
749    }
750}
751#[doc = "Controls FC4 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
752#[derive(Clone, Copy, Debug, PartialEq)]
753pub enum FC4DATAOUTEN_A {
754    #[doc = "0: Data output from FC4 does not contribute to this shared set."]
755    INPUT = 0,
756    #[doc = "1: Data output from FC4 does contribute to this shared set."]
757    OUTPUT = 1,
758}
759impl From<FC4DATAOUTEN_A> for bool {
760    #[inline(always)]
761    fn from(variant: FC4DATAOUTEN_A) -> Self {
762        variant as u8 != 0
763    }
764}
765#[doc = "Field `FC4DATAOUTEN` reader - Controls FC4 contribution to SHAREDDATAOUT for this shared set."]
766pub struct FC4DATAOUTEN_R(crate::FieldReader<bool, FC4DATAOUTEN_A>);
767impl FC4DATAOUTEN_R {
768    #[inline(always)]
769    pub(crate) fn new(bits: bool) -> Self {
770        FC4DATAOUTEN_R(crate::FieldReader::new(bits))
771    }
772    #[doc = r"Get enumerated values variant"]
773    #[inline(always)]
774    pub fn variant(&self) -> FC4DATAOUTEN_A {
775        match self.bits {
776            false => FC4DATAOUTEN_A::INPUT,
777            true => FC4DATAOUTEN_A::OUTPUT,
778        }
779    }
780    #[doc = "Checks if the value of the field is `INPUT`"]
781    #[inline(always)]
782    pub fn is_input(&self) -> bool {
783        **self == FC4DATAOUTEN_A::INPUT
784    }
785    #[doc = "Checks if the value of the field is `OUTPUT`"]
786    #[inline(always)]
787    pub fn is_output(&self) -> bool {
788        **self == FC4DATAOUTEN_A::OUTPUT
789    }
790}
791impl core::ops::Deref for FC4DATAOUTEN_R {
792    type Target = crate::FieldReader<bool, FC4DATAOUTEN_A>;
793    #[inline(always)]
794    fn deref(&self) -> &Self::Target {
795        &self.0
796    }
797}
798#[doc = "Field `FC4DATAOUTEN` writer - Controls FC4 contribution to SHAREDDATAOUT for this shared set."]
799pub struct FC4DATAOUTEN_W<'a> {
800    w: &'a mut W,
801}
802impl<'a> FC4DATAOUTEN_W<'a> {
803    #[doc = r"Writes `variant` to the field"]
804    #[inline(always)]
805    pub fn variant(self, variant: FC4DATAOUTEN_A) -> &'a mut W {
806        self.bit(variant.into())
807    }
808    #[doc = "Data output from FC4 does not contribute to this shared set."]
809    #[inline(always)]
810    pub fn input(self) -> &'a mut W {
811        self.variant(FC4DATAOUTEN_A::INPUT)
812    }
813    #[doc = "Data output from FC4 does contribute to this shared set."]
814    #[inline(always)]
815    pub fn output(self) -> &'a mut W {
816        self.variant(FC4DATAOUTEN_A::OUTPUT)
817    }
818    #[doc = r"Sets the field bit"]
819    #[inline(always)]
820    pub fn set_bit(self) -> &'a mut W {
821        self.bit(true)
822    }
823    #[doc = r"Clears the field bit"]
824    #[inline(always)]
825    pub fn clear_bit(self) -> &'a mut W {
826        self.bit(false)
827    }
828    #[doc = r"Writes raw bits to the field"]
829    #[inline(always)]
830    pub fn bit(self, value: bool) -> &'a mut W {
831        self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
832        self.w
833    }
834}
835#[doc = "Controls FC5 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
836#[derive(Clone, Copy, Debug, PartialEq)]
837pub enum FC5DATAOUTEN_A {
838    #[doc = "0: Data output from FC5 does not contribute to this shared set."]
839    INPUT = 0,
840    #[doc = "1: Data output from FC5 does contribute to this shared set."]
841    OUTPUT = 1,
842}
843impl From<FC5DATAOUTEN_A> for bool {
844    #[inline(always)]
845    fn from(variant: FC5DATAOUTEN_A) -> Self {
846        variant as u8 != 0
847    }
848}
849#[doc = "Field `FC5DATAOUTEN` reader - Controls FC5 contribution to SHAREDDATAOUT for this shared set."]
850pub struct FC5DATAOUTEN_R(crate::FieldReader<bool, FC5DATAOUTEN_A>);
851impl FC5DATAOUTEN_R {
852    #[inline(always)]
853    pub(crate) fn new(bits: bool) -> Self {
854        FC5DATAOUTEN_R(crate::FieldReader::new(bits))
855    }
856    #[doc = r"Get enumerated values variant"]
857    #[inline(always)]
858    pub fn variant(&self) -> FC5DATAOUTEN_A {
859        match self.bits {
860            false => FC5DATAOUTEN_A::INPUT,
861            true => FC5DATAOUTEN_A::OUTPUT,
862        }
863    }
864    #[doc = "Checks if the value of the field is `INPUT`"]
865    #[inline(always)]
866    pub fn is_input(&self) -> bool {
867        **self == FC5DATAOUTEN_A::INPUT
868    }
869    #[doc = "Checks if the value of the field is `OUTPUT`"]
870    #[inline(always)]
871    pub fn is_output(&self) -> bool {
872        **self == FC5DATAOUTEN_A::OUTPUT
873    }
874}
875impl core::ops::Deref for FC5DATAOUTEN_R {
876    type Target = crate::FieldReader<bool, FC5DATAOUTEN_A>;
877    #[inline(always)]
878    fn deref(&self) -> &Self::Target {
879        &self.0
880    }
881}
882#[doc = "Field `FC5DATAOUTEN` writer - Controls FC5 contribution to SHAREDDATAOUT for this shared set."]
883pub struct FC5DATAOUTEN_W<'a> {
884    w: &'a mut W,
885}
886impl<'a> FC5DATAOUTEN_W<'a> {
887    #[doc = r"Writes `variant` to the field"]
888    #[inline(always)]
889    pub fn variant(self, variant: FC5DATAOUTEN_A) -> &'a mut W {
890        self.bit(variant.into())
891    }
892    #[doc = "Data output from FC5 does not contribute to this shared set."]
893    #[inline(always)]
894    pub fn input(self) -> &'a mut W {
895        self.variant(FC5DATAOUTEN_A::INPUT)
896    }
897    #[doc = "Data output from FC5 does contribute to this shared set."]
898    #[inline(always)]
899    pub fn output(self) -> &'a mut W {
900        self.variant(FC5DATAOUTEN_A::OUTPUT)
901    }
902    #[doc = r"Sets the field bit"]
903    #[inline(always)]
904    pub fn set_bit(self) -> &'a mut W {
905        self.bit(true)
906    }
907    #[doc = r"Clears the field bit"]
908    #[inline(always)]
909    pub fn clear_bit(self) -> &'a mut W {
910        self.bit(false)
911    }
912    #[doc = r"Writes raw bits to the field"]
913    #[inline(always)]
914    pub fn bit(self, value: bool) -> &'a mut W {
915        self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
916        self.w
917    }
918}
919#[doc = "Controls FC6 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
920#[derive(Clone, Copy, Debug, PartialEq)]
921pub enum FC6DATAOUTEN_A {
922    #[doc = "0: Data output from FC6 does not contribute to this shared set."]
923    INPUT = 0,
924    #[doc = "1: Data output from FC6 does contribute to this shared set."]
925    OUTPUT = 1,
926}
927impl From<FC6DATAOUTEN_A> for bool {
928    #[inline(always)]
929    fn from(variant: FC6DATAOUTEN_A) -> Self {
930        variant as u8 != 0
931    }
932}
933#[doc = "Field `FC6DATAOUTEN` reader - Controls FC6 contribution to SHAREDDATAOUT for this shared set."]
934pub struct FC6DATAOUTEN_R(crate::FieldReader<bool, FC6DATAOUTEN_A>);
935impl FC6DATAOUTEN_R {
936    #[inline(always)]
937    pub(crate) fn new(bits: bool) -> Self {
938        FC6DATAOUTEN_R(crate::FieldReader::new(bits))
939    }
940    #[doc = r"Get enumerated values variant"]
941    #[inline(always)]
942    pub fn variant(&self) -> FC6DATAOUTEN_A {
943        match self.bits {
944            false => FC6DATAOUTEN_A::INPUT,
945            true => FC6DATAOUTEN_A::OUTPUT,
946        }
947    }
948    #[doc = "Checks if the value of the field is `INPUT`"]
949    #[inline(always)]
950    pub fn is_input(&self) -> bool {
951        **self == FC6DATAOUTEN_A::INPUT
952    }
953    #[doc = "Checks if the value of the field is `OUTPUT`"]
954    #[inline(always)]
955    pub fn is_output(&self) -> bool {
956        **self == FC6DATAOUTEN_A::OUTPUT
957    }
958}
959impl core::ops::Deref for FC6DATAOUTEN_R {
960    type Target = crate::FieldReader<bool, FC6DATAOUTEN_A>;
961    #[inline(always)]
962    fn deref(&self) -> &Self::Target {
963        &self.0
964    }
965}
966#[doc = "Field `FC6DATAOUTEN` writer - Controls FC6 contribution to SHAREDDATAOUT for this shared set."]
967pub struct FC6DATAOUTEN_W<'a> {
968    w: &'a mut W,
969}
970impl<'a> FC6DATAOUTEN_W<'a> {
971    #[doc = r"Writes `variant` to the field"]
972    #[inline(always)]
973    pub fn variant(self, variant: FC6DATAOUTEN_A) -> &'a mut W {
974        self.bit(variant.into())
975    }
976    #[doc = "Data output from FC6 does not contribute to this shared set."]
977    #[inline(always)]
978    pub fn input(self) -> &'a mut W {
979        self.variant(FC6DATAOUTEN_A::INPUT)
980    }
981    #[doc = "Data output from FC6 does contribute to this shared set."]
982    #[inline(always)]
983    pub fn output(self) -> &'a mut W {
984        self.variant(FC6DATAOUTEN_A::OUTPUT)
985    }
986    #[doc = r"Sets the field bit"]
987    #[inline(always)]
988    pub fn set_bit(self) -> &'a mut W {
989        self.bit(true)
990    }
991    #[doc = r"Clears the field bit"]
992    #[inline(always)]
993    pub fn clear_bit(self) -> &'a mut W {
994        self.bit(false)
995    }
996    #[doc = r"Writes raw bits to the field"]
997    #[inline(always)]
998    pub fn bit(self, value: bool) -> &'a mut W {
999        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
1000        self.w
1001    }
1002}
1003#[doc = "Controls FC7 contribution to SHAREDDATAOUT for this shared set.\n\nValue on reset: 0"]
1004#[derive(Clone, Copy, Debug, PartialEq)]
1005pub enum FC7DATAOUTEN_A {
1006    #[doc = "0: Data output from FC7 does not contribute to this shared set."]
1007    INPUT = 0,
1008    #[doc = "1: Data output from FC7 does contribute to this shared set."]
1009    OUTPUT = 1,
1010}
1011impl From<FC7DATAOUTEN_A> for bool {
1012    #[inline(always)]
1013    fn from(variant: FC7DATAOUTEN_A) -> Self {
1014        variant as u8 != 0
1015    }
1016}
1017#[doc = "Field `FC7DATAOUTEN` reader - Controls FC7 contribution to SHAREDDATAOUT for this shared set."]
1018pub struct FC7DATAOUTEN_R(crate::FieldReader<bool, FC7DATAOUTEN_A>);
1019impl FC7DATAOUTEN_R {
1020    #[inline(always)]
1021    pub(crate) fn new(bits: bool) -> Self {
1022        FC7DATAOUTEN_R(crate::FieldReader::new(bits))
1023    }
1024    #[doc = r"Get enumerated values variant"]
1025    #[inline(always)]
1026    pub fn variant(&self) -> FC7DATAOUTEN_A {
1027        match self.bits {
1028            false => FC7DATAOUTEN_A::INPUT,
1029            true => FC7DATAOUTEN_A::OUTPUT,
1030        }
1031    }
1032    #[doc = "Checks if the value of the field is `INPUT`"]
1033    #[inline(always)]
1034    pub fn is_input(&self) -> bool {
1035        **self == FC7DATAOUTEN_A::INPUT
1036    }
1037    #[doc = "Checks if the value of the field is `OUTPUT`"]
1038    #[inline(always)]
1039    pub fn is_output(&self) -> bool {
1040        **self == FC7DATAOUTEN_A::OUTPUT
1041    }
1042}
1043impl core::ops::Deref for FC7DATAOUTEN_R {
1044    type Target = crate::FieldReader<bool, FC7DATAOUTEN_A>;
1045    #[inline(always)]
1046    fn deref(&self) -> &Self::Target {
1047        &self.0
1048    }
1049}
1050#[doc = "Field `FC7DATAOUTEN` writer - Controls FC7 contribution to SHAREDDATAOUT for this shared set."]
1051pub struct FC7DATAOUTEN_W<'a> {
1052    w: &'a mut W,
1053}
1054impl<'a> FC7DATAOUTEN_W<'a> {
1055    #[doc = r"Writes `variant` to the field"]
1056    #[inline(always)]
1057    pub fn variant(self, variant: FC7DATAOUTEN_A) -> &'a mut W {
1058        self.bit(variant.into())
1059    }
1060    #[doc = "Data output from FC7 does not contribute to this shared set."]
1061    #[inline(always)]
1062    pub fn input(self) -> &'a mut W {
1063        self.variant(FC7DATAOUTEN_A::INPUT)
1064    }
1065    #[doc = "Data output from FC7 does contribute to this shared set."]
1066    #[inline(always)]
1067    pub fn output(self) -> &'a mut W {
1068        self.variant(FC7DATAOUTEN_A::OUTPUT)
1069    }
1070    #[doc = r"Sets the field bit"]
1071    #[inline(always)]
1072    pub fn set_bit(self) -> &'a mut W {
1073        self.bit(true)
1074    }
1075    #[doc = r"Clears the field bit"]
1076    #[inline(always)]
1077    pub fn clear_bit(self) -> &'a mut W {
1078        self.bit(false)
1079    }
1080    #[doc = r"Writes raw bits to the field"]
1081    #[inline(always)]
1082    pub fn bit(self, value: bool) -> &'a mut W {
1083        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
1084        self.w
1085    }
1086}
1087impl R {
1088    #[doc = "Bits 0:2 - Selects the source for SCK of this shared signal set."]
1089    #[inline(always)]
1090    pub fn sharedscksel(&self) -> SHAREDSCKSEL_R {
1091        SHAREDSCKSEL_R::new((self.bits & 0x07) as u8)
1092    }
1093    #[doc = "Bits 4:6 - Selects the source for WS of this shared signal set."]
1094    #[inline(always)]
1095    pub fn sharedwssel(&self) -> SHAREDWSSEL_R {
1096        SHAREDWSSEL_R::new(((self.bits >> 4) & 0x07) as u8)
1097    }
1098    #[doc = "Bits 8:10 - Selects the source for DATA input for this shared signal set."]
1099    #[inline(always)]
1100    pub fn shareddatasel(&self) -> SHAREDDATASEL_R {
1101        SHAREDDATASEL_R::new(((self.bits >> 8) & 0x07) as u8)
1102    }
1103    #[doc = "Bit 16 - Controls FC0 contribution to SHAREDDATAOUT for this shared set."]
1104    #[inline(always)]
1105    pub fn fc0dataouten(&self) -> FC0DATAOUTEN_R {
1106        FC0DATAOUTEN_R::new(((self.bits >> 16) & 0x01) != 0)
1107    }
1108    #[doc = "Bit 17 - Controls FC1 contribution to SHAREDDATAOUT for this shared set."]
1109    #[inline(always)]
1110    pub fn fc1dataouten(&self) -> FC1DATAOUTEN_R {
1111        FC1DATAOUTEN_R::new(((self.bits >> 17) & 0x01) != 0)
1112    }
1113    #[doc = "Bit 18 - Controls FC2 contribution to SHAREDDATAOUT for this shared set."]
1114    #[inline(always)]
1115    pub fn fc2dataouten(&self) -> FC2DATAOUTEN_R {
1116        FC2DATAOUTEN_R::new(((self.bits >> 18) & 0x01) != 0)
1117    }
1118    #[doc = "Bit 20 - Controls FC4 contribution to SHAREDDATAOUT for this shared set."]
1119    #[inline(always)]
1120    pub fn fc4dataouten(&self) -> FC4DATAOUTEN_R {
1121        FC4DATAOUTEN_R::new(((self.bits >> 20) & 0x01) != 0)
1122    }
1123    #[doc = "Bit 21 - Controls FC5 contribution to SHAREDDATAOUT for this shared set."]
1124    #[inline(always)]
1125    pub fn fc5dataouten(&self) -> FC5DATAOUTEN_R {
1126        FC5DATAOUTEN_R::new(((self.bits >> 21) & 0x01) != 0)
1127    }
1128    #[doc = "Bit 22 - Controls FC6 contribution to SHAREDDATAOUT for this shared set."]
1129    #[inline(always)]
1130    pub fn fc6dataouten(&self) -> FC6DATAOUTEN_R {
1131        FC6DATAOUTEN_R::new(((self.bits >> 22) & 0x01) != 0)
1132    }
1133    #[doc = "Bit 23 - Controls FC7 contribution to SHAREDDATAOUT for this shared set."]
1134    #[inline(always)]
1135    pub fn fc7dataouten(&self) -> FC7DATAOUTEN_R {
1136        FC7DATAOUTEN_R::new(((self.bits >> 23) & 0x01) != 0)
1137    }
1138}
1139impl W {
1140    #[doc = "Bits 0:2 - Selects the source for SCK of this shared signal set."]
1141    #[inline(always)]
1142    pub fn sharedscksel(&mut self) -> SHAREDSCKSEL_W {
1143        SHAREDSCKSEL_W { w: self }
1144    }
1145    #[doc = "Bits 4:6 - Selects the source for WS of this shared signal set."]
1146    #[inline(always)]
1147    pub fn sharedwssel(&mut self) -> SHAREDWSSEL_W {
1148        SHAREDWSSEL_W { w: self }
1149    }
1150    #[doc = "Bits 8:10 - Selects the source for DATA input for this shared signal set."]
1151    #[inline(always)]
1152    pub fn shareddatasel(&mut self) -> SHAREDDATASEL_W {
1153        SHAREDDATASEL_W { w: self }
1154    }
1155    #[doc = "Bit 16 - Controls FC0 contribution to SHAREDDATAOUT for this shared set."]
1156    #[inline(always)]
1157    pub fn fc0dataouten(&mut self) -> FC0DATAOUTEN_W {
1158        FC0DATAOUTEN_W { w: self }
1159    }
1160    #[doc = "Bit 17 - Controls FC1 contribution to SHAREDDATAOUT for this shared set."]
1161    #[inline(always)]
1162    pub fn fc1dataouten(&mut self) -> FC1DATAOUTEN_W {
1163        FC1DATAOUTEN_W { w: self }
1164    }
1165    #[doc = "Bit 18 - Controls FC2 contribution to SHAREDDATAOUT for this shared set."]
1166    #[inline(always)]
1167    pub fn fc2dataouten(&mut self) -> FC2DATAOUTEN_W {
1168        FC2DATAOUTEN_W { w: self }
1169    }
1170    #[doc = "Bit 20 - Controls FC4 contribution to SHAREDDATAOUT for this shared set."]
1171    #[inline(always)]
1172    pub fn fc4dataouten(&mut self) -> FC4DATAOUTEN_W {
1173        FC4DATAOUTEN_W { w: self }
1174    }
1175    #[doc = "Bit 21 - Controls FC5 contribution to SHAREDDATAOUT for this shared set."]
1176    #[inline(always)]
1177    pub fn fc5dataouten(&mut self) -> FC5DATAOUTEN_W {
1178        FC5DATAOUTEN_W { w: self }
1179    }
1180    #[doc = "Bit 22 - Controls FC6 contribution to SHAREDDATAOUT for this shared set."]
1181    #[inline(always)]
1182    pub fn fc6dataouten(&mut self) -> FC6DATAOUTEN_W {
1183        FC6DATAOUTEN_W { w: self }
1184    }
1185    #[doc = "Bit 23 - Controls FC7 contribution to SHAREDDATAOUT for this shared set."]
1186    #[inline(always)]
1187    pub fn fc7dataouten(&mut self) -> FC7DATAOUTEN_W {
1188        FC7DATAOUTEN_W { w: self }
1189    }
1190    #[doc = "Writes raw bits to the register."]
1191    #[inline(always)]
1192    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1193        self.0.bits(bits);
1194        self
1195    }
1196}
1197#[doc = "Selects sources and data combinations for shared signal set index.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sharedctrlset](index.html) module"]
1198pub struct SHAREDCTRLSET_SPEC;
1199impl crate::RegisterSpec for SHAREDCTRLSET_SPEC {
1200    type Ux = u32;
1201}
1202#[doc = "`read()` method returns [sharedctrlset::R](R) reader structure"]
1203impl crate::Readable for SHAREDCTRLSET_SPEC {
1204    type Reader = R;
1205}
1206#[doc = "`write(|w| ..)` method takes [sharedctrlset::W](W) writer structure"]
1207impl crate::Writable for SHAREDCTRLSET_SPEC {
1208    type Writer = W;
1209}
1210#[doc = "`reset()` method sets SHAREDCTRLSET%s to value 0"]
1211impl crate::Resettable for SHAREDCTRLSET_SPEC {
1212    #[inline(always)]
1213    fn reset_value() -> Self::Ux {
1214        0
1215    }
1216}
lpc55_pac/sysctl/sharedctrlset.rs

lpc55_pac/sysctl/
sharedctrlset.rs
