lpc55_pac/spi0/
intenset.rs

1#[doc = "Register `INTENSET` reader"]
2pub struct R(crate::R<INTENSET_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENSET_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENSET_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENSET` writer"]
17pub struct W(crate::W<INTENSET_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENSET_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENSET_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Slave select assert interrupt enable. Determines whether an interrupt occurs when the Slave Select is asserted.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum SSAEN_A {
40    #[doc = "0: Disabled. No interrupt will be generated when any Slave Select transitions from deasserted to asserted."]
41    DISABLED = 0,
42    #[doc = "1: Enabled. An interrupt will be generated when any Slave Select transitions from deasserted to asserted."]
43    ENABLED = 1,
44}
45impl From<SSAEN_A> for bool {
46    #[inline(always)]
47    fn from(variant: SSAEN_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `SSAEN` reader - Slave select assert interrupt enable. Determines whether an interrupt occurs when the Slave Select is asserted."]
52pub struct SSAEN_R(crate::FieldReader<bool, SSAEN_A>);
53impl SSAEN_R {
54    #[inline(always)]
55    pub(crate) fn new(bits: bool) -> Self {
56        SSAEN_R(crate::FieldReader::new(bits))
57    }
58    #[doc = r"Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> SSAEN_A {
61        match self.bits {
62            false => SSAEN_A::DISABLED,
63            true => SSAEN_A::ENABLED,
64        }
65    }
66    #[doc = "Checks if the value of the field is `DISABLED`"]
67    #[inline(always)]
68    pub fn is_disabled(&self) -> bool {
69        **self == SSAEN_A::DISABLED
70    }
71    #[doc = "Checks if the value of the field is `ENABLED`"]
72    #[inline(always)]
73    pub fn is_enabled(&self) -> bool {
74        **self == SSAEN_A::ENABLED
75    }
76}
77impl core::ops::Deref for SSAEN_R {
78    type Target = crate::FieldReader<bool, SSAEN_A>;
79    #[inline(always)]
80    fn deref(&self) -> &Self::Target {
81        &self.0
82    }
83}
84#[doc = "Field `SSAEN` writer - Slave select assert interrupt enable. Determines whether an interrupt occurs when the Slave Select is asserted."]
85pub struct SSAEN_W<'a> {
86    w: &'a mut W,
87}
88impl<'a> SSAEN_W<'a> {
89    #[doc = r"Writes `variant` to the field"]
90    #[inline(always)]
91    pub fn variant(self, variant: SSAEN_A) -> &'a mut W {
92        self.bit(variant.into())
93    }
94    #[doc = "Disabled. No interrupt will be generated when any Slave Select transitions from deasserted to asserted."]
95    #[inline(always)]
96    pub fn disabled(self) -> &'a mut W {
97        self.variant(SSAEN_A::DISABLED)
98    }
99    #[doc = "Enabled. An interrupt will be generated when any Slave Select transitions from deasserted to asserted."]
100    #[inline(always)]
101    pub fn enabled(self) -> &'a mut W {
102        self.variant(SSAEN_A::ENABLED)
103    }
104    #[doc = r"Sets the field bit"]
105    #[inline(always)]
106    pub fn set_bit(self) -> &'a mut W {
107        self.bit(true)
108    }
109    #[doc = r"Clears the field bit"]
110    #[inline(always)]
111    pub fn clear_bit(self) -> &'a mut W {
112        self.bit(false)
113    }
114    #[doc = r"Writes raw bits to the field"]
115    #[inline(always)]
116    pub fn bit(self, value: bool) -> &'a mut W {
117        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
118        self.w
119    }
120}
121#[doc = "Slave select deassert interrupt enable. Determines whether an interrupt occurs when the Slave Select is deasserted.\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum SSDEN_A {
124    #[doc = "0: Disabled. No interrupt will be generated when all asserted Slave Selects transition to deasserted."]
125    DISABLED = 0,
126    #[doc = "1: Enabled. An interrupt will be generated when all asserted Slave Selects transition to deasserted."]
127    ENABLED = 1,
128}
129impl From<SSDEN_A> for bool {
130    #[inline(always)]
131    fn from(variant: SSDEN_A) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `SSDEN` reader - Slave select deassert interrupt enable. Determines whether an interrupt occurs when the Slave Select is deasserted."]
136pub struct SSDEN_R(crate::FieldReader<bool, SSDEN_A>);
137impl SSDEN_R {
138    #[inline(always)]
139    pub(crate) fn new(bits: bool) -> Self {
140        SSDEN_R(crate::FieldReader::new(bits))
141    }
142    #[doc = r"Get enumerated values variant"]
143    #[inline(always)]
144    pub fn variant(&self) -> SSDEN_A {
145        match self.bits {
146            false => SSDEN_A::DISABLED,
147            true => SSDEN_A::ENABLED,
148        }
149    }
150    #[doc = "Checks if the value of the field is `DISABLED`"]
151    #[inline(always)]
152    pub fn is_disabled(&self) -> bool {
153        **self == SSDEN_A::DISABLED
154    }
155    #[doc = "Checks if the value of the field is `ENABLED`"]
156    #[inline(always)]
157    pub fn is_enabled(&self) -> bool {
158        **self == SSDEN_A::ENABLED
159    }
160}
161impl core::ops::Deref for SSDEN_R {
162    type Target = crate::FieldReader<bool, SSDEN_A>;
163    #[inline(always)]
164    fn deref(&self) -> &Self::Target {
165        &self.0
166    }
167}
168#[doc = "Field `SSDEN` writer - Slave select deassert interrupt enable. Determines whether an interrupt occurs when the Slave Select is deasserted."]
169pub struct SSDEN_W<'a> {
170    w: &'a mut W,
171}
172impl<'a> SSDEN_W<'a> {
173    #[doc = r"Writes `variant` to the field"]
174    #[inline(always)]
175    pub fn variant(self, variant: SSDEN_A) -> &'a mut W {
176        self.bit(variant.into())
177    }
178    #[doc = "Disabled. No interrupt will be generated when all asserted Slave Selects transition to deasserted."]
179    #[inline(always)]
180    pub fn disabled(self) -> &'a mut W {
181        self.variant(SSDEN_A::DISABLED)
182    }
183    #[doc = "Enabled. An interrupt will be generated when all asserted Slave Selects transition to deasserted."]
184    #[inline(always)]
185    pub fn enabled(self) -> &'a mut W {
186        self.variant(SSDEN_A::ENABLED)
187    }
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
202        self.w
203    }
204}
205#[doc = "Master idle interrupt enable.\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq)]
207pub enum MSTIDLEEN_A {
208    #[doc = "0: No interrupt will be generated when the SPI master function is idle."]
209    DISABLED = 0,
210    #[doc = "1: An interrupt will be generated when the SPI master function is fully idle."]
211    ENABLED = 1,
212}
213impl From<MSTIDLEEN_A> for bool {
214    #[inline(always)]
215    fn from(variant: MSTIDLEEN_A) -> Self {
216        variant as u8 != 0
217    }
218}
219#[doc = "Field `MSTIDLEEN` reader - Master idle interrupt enable."]
220pub struct MSTIDLEEN_R(crate::FieldReader<bool, MSTIDLEEN_A>);
221impl MSTIDLEEN_R {
222    #[inline(always)]
223    pub(crate) fn new(bits: bool) -> Self {
224        MSTIDLEEN_R(crate::FieldReader::new(bits))
225    }
226    #[doc = r"Get enumerated values variant"]
227    #[inline(always)]
228    pub fn variant(&self) -> MSTIDLEEN_A {
229        match self.bits {
230            false => MSTIDLEEN_A::DISABLED,
231            true => MSTIDLEEN_A::ENABLED,
232        }
233    }
234    #[doc = "Checks if the value of the field is `DISABLED`"]
235    #[inline(always)]
236    pub fn is_disabled(&self) -> bool {
237        **self == MSTIDLEEN_A::DISABLED
238    }
239    #[doc = "Checks if the value of the field is `ENABLED`"]
240    #[inline(always)]
241    pub fn is_enabled(&self) -> bool {
242        **self == MSTIDLEEN_A::ENABLED
243    }
244}
245impl core::ops::Deref for MSTIDLEEN_R {
246    type Target = crate::FieldReader<bool, MSTIDLEEN_A>;
247    #[inline(always)]
248    fn deref(&self) -> &Self::Target {
249        &self.0
250    }
251}
252#[doc = "Field `MSTIDLEEN` writer - Master idle interrupt enable."]
253pub struct MSTIDLEEN_W<'a> {
254    w: &'a mut W,
255}
256impl<'a> MSTIDLEEN_W<'a> {
257    #[doc = r"Writes `variant` to the field"]
258    #[inline(always)]
259    pub fn variant(self, variant: MSTIDLEEN_A) -> &'a mut W {
260        self.bit(variant.into())
261    }
262    #[doc = "No interrupt will be generated when the SPI master function is idle."]
263    #[inline(always)]
264    pub fn disabled(self) -> &'a mut W {
265        self.variant(MSTIDLEEN_A::DISABLED)
266    }
267    #[doc = "An interrupt will be generated when the SPI master function is fully idle."]
268    #[inline(always)]
269    pub fn enabled(self) -> &'a mut W {
270        self.variant(MSTIDLEEN_A::ENABLED)
271    }
272    #[doc = r"Sets the field bit"]
273    #[inline(always)]
274    pub fn set_bit(self) -> &'a mut W {
275        self.bit(true)
276    }
277    #[doc = r"Clears the field bit"]
278    #[inline(always)]
279    pub fn clear_bit(self) -> &'a mut W {
280        self.bit(false)
281    }
282    #[doc = r"Writes raw bits to the field"]
283    #[inline(always)]
284    pub fn bit(self, value: bool) -> &'a mut W {
285        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
286        self.w
287    }
288}
289impl R {
290    #[doc = "Bit 4 - Slave select assert interrupt enable. Determines whether an interrupt occurs when the Slave Select is asserted."]
291    #[inline(always)]
292    pub fn ssaen(&self) -> SSAEN_R {
293        SSAEN_R::new(((self.bits >> 4) & 0x01) != 0)
294    }
295    #[doc = "Bit 5 - Slave select deassert interrupt enable. Determines whether an interrupt occurs when the Slave Select is deasserted."]
296    #[inline(always)]
297    pub fn ssden(&self) -> SSDEN_R {
298        SSDEN_R::new(((self.bits >> 5) & 0x01) != 0)
299    }
300    #[doc = "Bit 8 - Master idle interrupt enable."]
301    #[inline(always)]
302    pub fn mstidleen(&self) -> MSTIDLEEN_R {
303        MSTIDLEEN_R::new(((self.bits >> 8) & 0x01) != 0)
304    }
305}
306impl W {
307    #[doc = "Bit 4 - Slave select assert interrupt enable. Determines whether an interrupt occurs when the Slave Select is asserted."]
308    #[inline(always)]
309    pub fn ssaen(&mut self) -> SSAEN_W {
310        SSAEN_W { w: self }
311    }
312    #[doc = "Bit 5 - Slave select deassert interrupt enable. Determines whether an interrupt occurs when the Slave Select is deasserted."]
313    #[inline(always)]
314    pub fn ssden(&mut self) -> SSDEN_W {
315        SSDEN_W { w: self }
316    }
317    #[doc = "Bit 8 - Master idle interrupt enable."]
318    #[inline(always)]
319    pub fn mstidleen(&mut self) -> MSTIDLEEN_W {
320        MSTIDLEEN_W { w: self }
321    }
322    #[doc = "Writes raw bits to the register."]
323    #[inline(always)]
324    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
325        self.0.bits(bits);
326        self
327    }
328}
329#[doc = "SPI Interrupt Enable read and Set. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
330pub struct INTENSET_SPEC;
331impl crate::RegisterSpec for INTENSET_SPEC {
332    type Ux = u32;
333}
334#[doc = "`read()` method returns [intenset::R](R) reader structure"]
335impl crate::Readable for INTENSET_SPEC {
336    type Reader = R;
337}
338#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
339impl crate::Writable for INTENSET_SPEC {
340    type Writer = W;
341}
342#[doc = "`reset()` method sets INTENSET to value 0"]
343impl crate::Resettable for INTENSET_SPEC {
344    #[inline(always)]
345    fn reset_value() -> Self::Ux {
346        0
347    }
348}
lpc55_pac/spi0/intenset.rs

lpc55_pac/spi0/
intenset.rs
