lpc55_pac/spi0/
cfg.rs

1#[doc = "Register `CFG` reader"]
2pub struct R(crate::R<CFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG` writer"]
17pub struct W(crate::W<CFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "SPI enable.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum ENABLE_A {
40    #[doc = "0: Disabled. The SPI is disabled and the internal state machine and counters are reset."]
41    DISABLED = 0,
42    #[doc = "1: Enabled. The SPI is enabled for operation."]
43    ENABLED = 1,
44}
45impl From<ENABLE_A> for bool {
46    #[inline(always)]
47    fn from(variant: ENABLE_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `ENABLE` reader - SPI enable."]
52pub struct ENABLE_R(crate::FieldReader<bool, ENABLE_A>);
53impl ENABLE_R {
54    #[inline(always)]
55    pub(crate) fn new(bits: bool) -> Self {
56        ENABLE_R(crate::FieldReader::new(bits))
57    }
58    #[doc = r"Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> ENABLE_A {
61        match self.bits {
62            false => ENABLE_A::DISABLED,
63            true => ENABLE_A::ENABLED,
64        }
65    }
66    #[doc = "Checks if the value of the field is `DISABLED`"]
67    #[inline(always)]
68    pub fn is_disabled(&self) -> bool {
69        **self == ENABLE_A::DISABLED
70    }
71    #[doc = "Checks if the value of the field is `ENABLED`"]
72    #[inline(always)]
73    pub fn is_enabled(&self) -> bool {
74        **self == ENABLE_A::ENABLED
75    }
76}
77impl core::ops::Deref for ENABLE_R {
78    type Target = crate::FieldReader<bool, ENABLE_A>;
79    #[inline(always)]
80    fn deref(&self) -> &Self::Target {
81        &self.0
82    }
83}
84#[doc = "Field `ENABLE` writer - SPI enable."]
85pub struct ENABLE_W<'a> {
86    w: &'a mut W,
87}
88impl<'a> ENABLE_W<'a> {
89    #[doc = r"Writes `variant` to the field"]
90    #[inline(always)]
91    pub fn variant(self, variant: ENABLE_A) -> &'a mut W {
92        self.bit(variant.into())
93    }
94    #[doc = "Disabled. The SPI is disabled and the internal state machine and counters are reset."]
95    #[inline(always)]
96    pub fn disabled(self) -> &'a mut W {
97        self.variant(ENABLE_A::DISABLED)
98    }
99    #[doc = "Enabled. The SPI is enabled for operation."]
100    #[inline(always)]
101    pub fn enabled(self) -> &'a mut W {
102        self.variant(ENABLE_A::ENABLED)
103    }
104    #[doc = r"Sets the field bit"]
105    #[inline(always)]
106    pub fn set_bit(self) -> &'a mut W {
107        self.bit(true)
108    }
109    #[doc = r"Clears the field bit"]
110    #[inline(always)]
111    pub fn clear_bit(self) -> &'a mut W {
112        self.bit(false)
113    }
114    #[doc = r"Writes raw bits to the field"]
115    #[inline(always)]
116    pub fn bit(self, value: bool) -> &'a mut W {
117        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
118        self.w
119    }
120}
121#[doc = "Master mode select.\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum MASTER_A {
124    #[doc = "0: Slave mode. The SPI will operate in slave mode. SCK, MOSI, and the SSEL signals are inputs, MISO is an output."]
125    SLAVE_MODE = 0,
126    #[doc = "1: Master mode. The SPI will operate in master mode. SCK, MOSI, and the SSEL signals are outputs, MISO is an input."]
127    MASTER_MODE = 1,
128}
129impl From<MASTER_A> for bool {
130    #[inline(always)]
131    fn from(variant: MASTER_A) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `MASTER` reader - Master mode select."]
136pub struct MASTER_R(crate::FieldReader<bool, MASTER_A>);
137impl MASTER_R {
138    #[inline(always)]
139    pub(crate) fn new(bits: bool) -> Self {
140        MASTER_R(crate::FieldReader::new(bits))
141    }
142    #[doc = r"Get enumerated values variant"]
143    #[inline(always)]
144    pub fn variant(&self) -> MASTER_A {
145        match self.bits {
146            false => MASTER_A::SLAVE_MODE,
147            true => MASTER_A::MASTER_MODE,
148        }
149    }
150    #[doc = "Checks if the value of the field is `SLAVE_MODE`"]
151    #[inline(always)]
152    pub fn is_slave_mode(&self) -> bool {
153        **self == MASTER_A::SLAVE_MODE
154    }
155    #[doc = "Checks if the value of the field is `MASTER_MODE`"]
156    #[inline(always)]
157    pub fn is_master_mode(&self) -> bool {
158        **self == MASTER_A::MASTER_MODE
159    }
160}
161impl core::ops::Deref for MASTER_R {
162    type Target = crate::FieldReader<bool, MASTER_A>;
163    #[inline(always)]
164    fn deref(&self) -> &Self::Target {
165        &self.0
166    }
167}
168#[doc = "Field `MASTER` writer - Master mode select."]
169pub struct MASTER_W<'a> {
170    w: &'a mut W,
171}
172impl<'a> MASTER_W<'a> {
173    #[doc = r"Writes `variant` to the field"]
174    #[inline(always)]
175    pub fn variant(self, variant: MASTER_A) -> &'a mut W {
176        self.bit(variant.into())
177    }
178    #[doc = "Slave mode. The SPI will operate in slave mode. SCK, MOSI, and the SSEL signals are inputs, MISO is an output."]
179    #[inline(always)]
180    pub fn slave_mode(self) -> &'a mut W {
181        self.variant(MASTER_A::SLAVE_MODE)
182    }
183    #[doc = "Master mode. The SPI will operate in master mode. SCK, MOSI, and the SSEL signals are outputs, MISO is an input."]
184    #[inline(always)]
185    pub fn master_mode(self) -> &'a mut W {
186        self.variant(MASTER_A::MASTER_MODE)
187    }
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
202        self.w
203    }
204}
205#[doc = "LSB First mode enable.\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq)]
207pub enum LSBF_A {
208    #[doc = "0: Standard. Data is transmitted and received in standard MSB first order."]
209    STANDARD = 0,
210    #[doc = "1: Reverse. Data is transmitted and received in reverse order (LSB first)."]
211    REVERSE = 1,
212}
213impl From<LSBF_A> for bool {
214    #[inline(always)]
215    fn from(variant: LSBF_A) -> Self {
216        variant as u8 != 0
217    }
218}
219#[doc = "Field `LSBF` reader - LSB First mode enable."]
220pub struct LSBF_R(crate::FieldReader<bool, LSBF_A>);
221impl LSBF_R {
222    #[inline(always)]
223    pub(crate) fn new(bits: bool) -> Self {
224        LSBF_R(crate::FieldReader::new(bits))
225    }
226    #[doc = r"Get enumerated values variant"]
227    #[inline(always)]
228    pub fn variant(&self) -> LSBF_A {
229        match self.bits {
230            false => LSBF_A::STANDARD,
231            true => LSBF_A::REVERSE,
232        }
233    }
234    #[doc = "Checks if the value of the field is `STANDARD`"]
235    #[inline(always)]
236    pub fn is_standard(&self) -> bool {
237        **self == LSBF_A::STANDARD
238    }
239    #[doc = "Checks if the value of the field is `REVERSE`"]
240    #[inline(always)]
241    pub fn is_reverse(&self) -> bool {
242        **self == LSBF_A::REVERSE
243    }
244}
245impl core::ops::Deref for LSBF_R {
246    type Target = crate::FieldReader<bool, LSBF_A>;
247    #[inline(always)]
248    fn deref(&self) -> &Self::Target {
249        &self.0
250    }
251}
252#[doc = "Field `LSBF` writer - LSB First mode enable."]
253pub struct LSBF_W<'a> {
254    w: &'a mut W,
255}
256impl<'a> LSBF_W<'a> {
257    #[doc = r"Writes `variant` to the field"]
258    #[inline(always)]
259    pub fn variant(self, variant: LSBF_A) -> &'a mut W {
260        self.bit(variant.into())
261    }
262    #[doc = "Standard. Data is transmitted and received in standard MSB first order."]
263    #[inline(always)]
264    pub fn standard(self) -> &'a mut W {
265        self.variant(LSBF_A::STANDARD)
266    }
267    #[doc = "Reverse. Data is transmitted and received in reverse order (LSB first)."]
268    #[inline(always)]
269    pub fn reverse(self) -> &'a mut W {
270        self.variant(LSBF_A::REVERSE)
271    }
272    #[doc = r"Sets the field bit"]
273    #[inline(always)]
274    pub fn set_bit(self) -> &'a mut W {
275        self.bit(true)
276    }
277    #[doc = r"Clears the field bit"]
278    #[inline(always)]
279    pub fn clear_bit(self) -> &'a mut W {
280        self.bit(false)
281    }
282    #[doc = r"Writes raw bits to the field"]
283    #[inline(always)]
284    pub fn bit(self, value: bool) -> &'a mut W {
285        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
286        self.w
287    }
288}
289#[doc = "Clock Phase select.\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq)]
291pub enum CPHA_A {
292    #[doc = "0: Change. The SPI captures serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is changed on the following edge."]
293    CHANGE = 0,
294    #[doc = "1: Capture. The SPI changes serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is captured on the following edge."]
295    CAPTURE = 1,
296}
297impl From<CPHA_A> for bool {
298    #[inline(always)]
299    fn from(variant: CPHA_A) -> Self {
300        variant as u8 != 0
301    }
302}
303#[doc = "Field `CPHA` reader - Clock Phase select."]
304pub struct CPHA_R(crate::FieldReader<bool, CPHA_A>);
305impl CPHA_R {
306    #[inline(always)]
307    pub(crate) fn new(bits: bool) -> Self {
308        CPHA_R(crate::FieldReader::new(bits))
309    }
310    #[doc = r"Get enumerated values variant"]
311    #[inline(always)]
312    pub fn variant(&self) -> CPHA_A {
313        match self.bits {
314            false => CPHA_A::CHANGE,
315            true => CPHA_A::CAPTURE,
316        }
317    }
318    #[doc = "Checks if the value of the field is `CHANGE`"]
319    #[inline(always)]
320    pub fn is_change(&self) -> bool {
321        **self == CPHA_A::CHANGE
322    }
323    #[doc = "Checks if the value of the field is `CAPTURE`"]
324    #[inline(always)]
325    pub fn is_capture(&self) -> bool {
326        **self == CPHA_A::CAPTURE
327    }
328}
329impl core::ops::Deref for CPHA_R {
330    type Target = crate::FieldReader<bool, CPHA_A>;
331    #[inline(always)]
332    fn deref(&self) -> &Self::Target {
333        &self.0
334    }
335}
336#[doc = "Field `CPHA` writer - Clock Phase select."]
337pub struct CPHA_W<'a> {
338    w: &'a mut W,
339}
340impl<'a> CPHA_W<'a> {
341    #[doc = r"Writes `variant` to the field"]
342    #[inline(always)]
343    pub fn variant(self, variant: CPHA_A) -> &'a mut W {
344        self.bit(variant.into())
345    }
346    #[doc = "Change. The SPI captures serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is changed on the following edge."]
347    #[inline(always)]
348    pub fn change(self) -> &'a mut W {
349        self.variant(CPHA_A::CHANGE)
350    }
351    #[doc = "Capture. The SPI changes serial data on the first clock transition of the transfer (when the clock changes away from the rest state). Data is captured on the following edge."]
352    #[inline(always)]
353    pub fn capture(self) -> &'a mut W {
354        self.variant(CPHA_A::CAPTURE)
355    }
356    #[doc = r"Sets the field bit"]
357    #[inline(always)]
358    pub fn set_bit(self) -> &'a mut W {
359        self.bit(true)
360    }
361    #[doc = r"Clears the field bit"]
362    #[inline(always)]
363    pub fn clear_bit(self) -> &'a mut W {
364        self.bit(false)
365    }
366    #[doc = r"Writes raw bits to the field"]
367    #[inline(always)]
368    pub fn bit(self, value: bool) -> &'a mut W {
369        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
370        self.w
371    }
372}
373#[doc = "Clock Polarity select.\n\nValue on reset: 0"]
374#[derive(Clone, Copy, Debug, PartialEq)]
375pub enum CPOL_A {
376    #[doc = "0: Low. The rest state of the clock (between transfers) is low."]
377    LOW = 0,
378    #[doc = "1: High. The rest state of the clock (between transfers) is high."]
379    HIGH = 1,
380}
381impl From<CPOL_A> for bool {
382    #[inline(always)]
383    fn from(variant: CPOL_A) -> Self {
384        variant as u8 != 0
385    }
386}
387#[doc = "Field `CPOL` reader - Clock Polarity select."]
388pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>);
389impl CPOL_R {
390    #[inline(always)]
391    pub(crate) fn new(bits: bool) -> Self {
392        CPOL_R(crate::FieldReader::new(bits))
393    }
394    #[doc = r"Get enumerated values variant"]
395    #[inline(always)]
396    pub fn variant(&self) -> CPOL_A {
397        match self.bits {
398            false => CPOL_A::LOW,
399            true => CPOL_A::HIGH,
400        }
401    }
402    #[doc = "Checks if the value of the field is `LOW`"]
403    #[inline(always)]
404    pub fn is_low(&self) -> bool {
405        **self == CPOL_A::LOW
406    }
407    #[doc = "Checks if the value of the field is `HIGH`"]
408    #[inline(always)]
409    pub fn is_high(&self) -> bool {
410        **self == CPOL_A::HIGH
411    }
412}
413impl core::ops::Deref for CPOL_R {
414    type Target = crate::FieldReader<bool, CPOL_A>;
415    #[inline(always)]
416    fn deref(&self) -> &Self::Target {
417        &self.0
418    }
419}
420#[doc = "Field `CPOL` writer - Clock Polarity select."]
421pub struct CPOL_W<'a> {
422    w: &'a mut W,
423}
424impl<'a> CPOL_W<'a> {
425    #[doc = r"Writes `variant` to the field"]
426    #[inline(always)]
427    pub fn variant(self, variant: CPOL_A) -> &'a mut W {
428        self.bit(variant.into())
429    }
430    #[doc = "Low. The rest state of the clock (between transfers) is low."]
431    #[inline(always)]
432    pub fn low(self) -> &'a mut W {
433        self.variant(CPOL_A::LOW)
434    }
435    #[doc = "High. The rest state of the clock (between transfers) is high."]
436    #[inline(always)]
437    pub fn high(self) -> &'a mut W {
438        self.variant(CPOL_A::HIGH)
439    }
440    #[doc = r"Sets the field bit"]
441    #[inline(always)]
442    pub fn set_bit(self) -> &'a mut W {
443        self.bit(true)
444    }
445    #[doc = r"Clears the field bit"]
446    #[inline(always)]
447    pub fn clear_bit(self) -> &'a mut W {
448        self.bit(false)
449    }
450    #[doc = r"Writes raw bits to the field"]
451    #[inline(always)]
452    pub fn bit(self, value: bool) -> &'a mut W {
453        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
454        self.w
455    }
456}
457#[doc = "Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing.\n\nValue on reset: 0"]
458#[derive(Clone, Copy, Debug, PartialEq)]
459pub enum LOOP_A {
460    #[doc = "0: Disabled."]
461    DISABLED = 0,
462    #[doc = "1: Enabled."]
463    ENABLED = 1,
464}
465impl From<LOOP_A> for bool {
466    #[inline(always)]
467    fn from(variant: LOOP_A) -> Self {
468        variant as u8 != 0
469    }
470}
471#[doc = "Field `LOOP` reader - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
472pub struct LOOP_R(crate::FieldReader<bool, LOOP_A>);
473impl LOOP_R {
474    #[inline(always)]
475    pub(crate) fn new(bits: bool) -> Self {
476        LOOP_R(crate::FieldReader::new(bits))
477    }
478    #[doc = r"Get enumerated values variant"]
479    #[inline(always)]
480    pub fn variant(&self) -> LOOP_A {
481        match self.bits {
482            false => LOOP_A::DISABLED,
483            true => LOOP_A::ENABLED,
484        }
485    }
486    #[doc = "Checks if the value of the field is `DISABLED`"]
487    #[inline(always)]
488    pub fn is_disabled(&self) -> bool {
489        **self == LOOP_A::DISABLED
490    }
491    #[doc = "Checks if the value of the field is `ENABLED`"]
492    #[inline(always)]
493    pub fn is_enabled(&self) -> bool {
494        **self == LOOP_A::ENABLED
495    }
496}
497impl core::ops::Deref for LOOP_R {
498    type Target = crate::FieldReader<bool, LOOP_A>;
499    #[inline(always)]
500    fn deref(&self) -> &Self::Target {
501        &self.0
502    }
503}
504#[doc = "Field `LOOP` writer - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
505pub struct LOOP_W<'a> {
506    w: &'a mut W,
507}
508impl<'a> LOOP_W<'a> {
509    #[doc = r"Writes `variant` to the field"]
510    #[inline(always)]
511    pub fn variant(self, variant: LOOP_A) -> &'a mut W {
512        self.bit(variant.into())
513    }
514    #[doc = "Disabled."]
515    #[inline(always)]
516    pub fn disabled(self) -> &'a mut W {
517        self.variant(LOOP_A::DISABLED)
518    }
519    #[doc = "Enabled."]
520    #[inline(always)]
521    pub fn enabled(self) -> &'a mut W {
522        self.variant(LOOP_A::ENABLED)
523    }
524    #[doc = r"Sets the field bit"]
525    #[inline(always)]
526    pub fn set_bit(self) -> &'a mut W {
527        self.bit(true)
528    }
529    #[doc = r"Clears the field bit"]
530    #[inline(always)]
531    pub fn clear_bit(self) -> &'a mut W {
532        self.bit(false)
533    }
534    #[doc = r"Writes raw bits to the field"]
535    #[inline(always)]
536    pub fn bit(self, value: bool) -> &'a mut W {
537        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
538        self.w
539    }
540}
541#[doc = "SSEL0 Polarity select.\n\nValue on reset: 0"]
542#[derive(Clone, Copy, Debug, PartialEq)]
543pub enum SPOL0_A {
544    #[doc = "0: Low. The SSEL0 pin is active low."]
545    LOW = 0,
546    #[doc = "1: High. The SSEL0 pin is active high."]
547    HIGH = 1,
548}
549impl From<SPOL0_A> for bool {
550    #[inline(always)]
551    fn from(variant: SPOL0_A) -> Self {
552        variant as u8 != 0
553    }
554}
555#[doc = "Field `SPOL0` reader - SSEL0 Polarity select."]
556pub struct SPOL0_R(crate::FieldReader<bool, SPOL0_A>);
557impl SPOL0_R {
558    #[inline(always)]
559    pub(crate) fn new(bits: bool) -> Self {
560        SPOL0_R(crate::FieldReader::new(bits))
561    }
562    #[doc = r"Get enumerated values variant"]
563    #[inline(always)]
564    pub fn variant(&self) -> SPOL0_A {
565        match self.bits {
566            false => SPOL0_A::LOW,
567            true => SPOL0_A::HIGH,
568        }
569    }
570    #[doc = "Checks if the value of the field is `LOW`"]
571    #[inline(always)]
572    pub fn is_low(&self) -> bool {
573        **self == SPOL0_A::LOW
574    }
575    #[doc = "Checks if the value of the field is `HIGH`"]
576    #[inline(always)]
577    pub fn is_high(&self) -> bool {
578        **self == SPOL0_A::HIGH
579    }
580}
581impl core::ops::Deref for SPOL0_R {
582    type Target = crate::FieldReader<bool, SPOL0_A>;
583    #[inline(always)]
584    fn deref(&self) -> &Self::Target {
585        &self.0
586    }
587}
588#[doc = "Field `SPOL0` writer - SSEL0 Polarity select."]
589pub struct SPOL0_W<'a> {
590    w: &'a mut W,
591}
592impl<'a> SPOL0_W<'a> {
593    #[doc = r"Writes `variant` to the field"]
594    #[inline(always)]
595    pub fn variant(self, variant: SPOL0_A) -> &'a mut W {
596        self.bit(variant.into())
597    }
598    #[doc = "Low. The SSEL0 pin is active low."]
599    #[inline(always)]
600    pub fn low(self) -> &'a mut W {
601        self.variant(SPOL0_A::LOW)
602    }
603    #[doc = "High. The SSEL0 pin is active high."]
604    #[inline(always)]
605    pub fn high(self) -> &'a mut W {
606        self.variant(SPOL0_A::HIGH)
607    }
608    #[doc = r"Sets the field bit"]
609    #[inline(always)]
610    pub fn set_bit(self) -> &'a mut W {
611        self.bit(true)
612    }
613    #[doc = r"Clears the field bit"]
614    #[inline(always)]
615    pub fn clear_bit(self) -> &'a mut W {
616        self.bit(false)
617    }
618    #[doc = r"Writes raw bits to the field"]
619    #[inline(always)]
620    pub fn bit(self, value: bool) -> &'a mut W {
621        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
622        self.w
623    }
624}
625#[doc = "SSEL1 Polarity select.\n\nValue on reset: 0"]
626#[derive(Clone, Copy, Debug, PartialEq)]
627pub enum SPOL1_A {
628    #[doc = "0: Low. The SSEL1 pin is active low."]
629    LOW = 0,
630    #[doc = "1: High. The SSEL1 pin is active high."]
631    HIGH = 1,
632}
633impl From<SPOL1_A> for bool {
634    #[inline(always)]
635    fn from(variant: SPOL1_A) -> Self {
636        variant as u8 != 0
637    }
638}
639#[doc = "Field `SPOL1` reader - SSEL1 Polarity select."]
640pub struct SPOL1_R(crate::FieldReader<bool, SPOL1_A>);
641impl SPOL1_R {
642    #[inline(always)]
643    pub(crate) fn new(bits: bool) -> Self {
644        SPOL1_R(crate::FieldReader::new(bits))
645    }
646    #[doc = r"Get enumerated values variant"]
647    #[inline(always)]
648    pub fn variant(&self) -> SPOL1_A {
649        match self.bits {
650            false => SPOL1_A::LOW,
651            true => SPOL1_A::HIGH,
652        }
653    }
654    #[doc = "Checks if the value of the field is `LOW`"]
655    #[inline(always)]
656    pub fn is_low(&self) -> bool {
657        **self == SPOL1_A::LOW
658    }
659    #[doc = "Checks if the value of the field is `HIGH`"]
660    #[inline(always)]
661    pub fn is_high(&self) -> bool {
662        **self == SPOL1_A::HIGH
663    }
664}
665impl core::ops::Deref for SPOL1_R {
666    type Target = crate::FieldReader<bool, SPOL1_A>;
667    #[inline(always)]
668    fn deref(&self) -> &Self::Target {
669        &self.0
670    }
671}
672#[doc = "Field `SPOL1` writer - SSEL1 Polarity select."]
673pub struct SPOL1_W<'a> {
674    w: &'a mut W,
675}
676impl<'a> SPOL1_W<'a> {
677    #[doc = r"Writes `variant` to the field"]
678    #[inline(always)]
679    pub fn variant(self, variant: SPOL1_A) -> &'a mut W {
680        self.bit(variant.into())
681    }
682    #[doc = "Low. The SSEL1 pin is active low."]
683    #[inline(always)]
684    pub fn low(self) -> &'a mut W {
685        self.variant(SPOL1_A::LOW)
686    }
687    #[doc = "High. The SSEL1 pin is active high."]
688    #[inline(always)]
689    pub fn high(self) -> &'a mut W {
690        self.variant(SPOL1_A::HIGH)
691    }
692    #[doc = r"Sets the field bit"]
693    #[inline(always)]
694    pub fn set_bit(self) -> &'a mut W {
695        self.bit(true)
696    }
697    #[doc = r"Clears the field bit"]
698    #[inline(always)]
699    pub fn clear_bit(self) -> &'a mut W {
700        self.bit(false)
701    }
702    #[doc = r"Writes raw bits to the field"]
703    #[inline(always)]
704    pub fn bit(self, value: bool) -> &'a mut W {
705        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
706        self.w
707    }
708}
709#[doc = "SSEL2 Polarity select.\n\nValue on reset: 0"]
710#[derive(Clone, Copy, Debug, PartialEq)]
711pub enum SPOL2_A {
712    #[doc = "0: Low. The SSEL2 pin is active low."]
713    LOW = 0,
714    #[doc = "1: High. The SSEL2 pin is active high."]
715    HIGH = 1,
716}
717impl From<SPOL2_A> for bool {
718    #[inline(always)]
719    fn from(variant: SPOL2_A) -> Self {
720        variant as u8 != 0
721    }
722}
723#[doc = "Field `SPOL2` reader - SSEL2 Polarity select."]
724pub struct SPOL2_R(crate::FieldReader<bool, SPOL2_A>);
725impl SPOL2_R {
726    #[inline(always)]
727    pub(crate) fn new(bits: bool) -> Self {
728        SPOL2_R(crate::FieldReader::new(bits))
729    }
730    #[doc = r"Get enumerated values variant"]
731    #[inline(always)]
732    pub fn variant(&self) -> SPOL2_A {
733        match self.bits {
734            false => SPOL2_A::LOW,
735            true => SPOL2_A::HIGH,
736        }
737    }
738    #[doc = "Checks if the value of the field is `LOW`"]
739    #[inline(always)]
740    pub fn is_low(&self) -> bool {
741        **self == SPOL2_A::LOW
742    }
743    #[doc = "Checks if the value of the field is `HIGH`"]
744    #[inline(always)]
745    pub fn is_high(&self) -> bool {
746        **self == SPOL2_A::HIGH
747    }
748}
749impl core::ops::Deref for SPOL2_R {
750    type Target = crate::FieldReader<bool, SPOL2_A>;
751    #[inline(always)]
752    fn deref(&self) -> &Self::Target {
753        &self.0
754    }
755}
756#[doc = "Field `SPOL2` writer - SSEL2 Polarity select."]
757pub struct SPOL2_W<'a> {
758    w: &'a mut W,
759}
760impl<'a> SPOL2_W<'a> {
761    #[doc = r"Writes `variant` to the field"]
762    #[inline(always)]
763    pub fn variant(self, variant: SPOL2_A) -> &'a mut W {
764        self.bit(variant.into())
765    }
766    #[doc = "Low. The SSEL2 pin is active low."]
767    #[inline(always)]
768    pub fn low(self) -> &'a mut W {
769        self.variant(SPOL2_A::LOW)
770    }
771    #[doc = "High. The SSEL2 pin is active high."]
772    #[inline(always)]
773    pub fn high(self) -> &'a mut W {
774        self.variant(SPOL2_A::HIGH)
775    }
776    #[doc = r"Sets the field bit"]
777    #[inline(always)]
778    pub fn set_bit(self) -> &'a mut W {
779        self.bit(true)
780    }
781    #[doc = r"Clears the field bit"]
782    #[inline(always)]
783    pub fn clear_bit(self) -> &'a mut W {
784        self.bit(false)
785    }
786    #[doc = r"Writes raw bits to the field"]
787    #[inline(always)]
788    pub fn bit(self, value: bool) -> &'a mut W {
789        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
790        self.w
791    }
792}
793#[doc = "SSEL3 Polarity select.\n\nValue on reset: 0"]
794#[derive(Clone, Copy, Debug, PartialEq)]
795pub enum SPOL3_A {
796    #[doc = "0: Low. The SSEL3 pin is active low."]
797    LOW = 0,
798    #[doc = "1: High. The SSEL3 pin is active high."]
799    HIGH = 1,
800}
801impl From<SPOL3_A> for bool {
802    #[inline(always)]
803    fn from(variant: SPOL3_A) -> Self {
804        variant as u8 != 0
805    }
806}
807#[doc = "Field `SPOL3` reader - SSEL3 Polarity select."]
808pub struct SPOL3_R(crate::FieldReader<bool, SPOL3_A>);
809impl SPOL3_R {
810    #[inline(always)]
811    pub(crate) fn new(bits: bool) -> Self {
812        SPOL3_R(crate::FieldReader::new(bits))
813    }
814    #[doc = r"Get enumerated values variant"]
815    #[inline(always)]
816    pub fn variant(&self) -> SPOL3_A {
817        match self.bits {
818            false => SPOL3_A::LOW,
819            true => SPOL3_A::HIGH,
820        }
821    }
822    #[doc = "Checks if the value of the field is `LOW`"]
823    #[inline(always)]
824    pub fn is_low(&self) -> bool {
825        **self == SPOL3_A::LOW
826    }
827    #[doc = "Checks if the value of the field is `HIGH`"]
828    #[inline(always)]
829    pub fn is_high(&self) -> bool {
830        **self == SPOL3_A::HIGH
831    }
832}
833impl core::ops::Deref for SPOL3_R {
834    type Target = crate::FieldReader<bool, SPOL3_A>;
835    #[inline(always)]
836    fn deref(&self) -> &Self::Target {
837        &self.0
838    }
839}
840#[doc = "Field `SPOL3` writer - SSEL3 Polarity select."]
841pub struct SPOL3_W<'a> {
842    w: &'a mut W,
843}
844impl<'a> SPOL3_W<'a> {
845    #[doc = r"Writes `variant` to the field"]
846    #[inline(always)]
847    pub fn variant(self, variant: SPOL3_A) -> &'a mut W {
848        self.bit(variant.into())
849    }
850    #[doc = "Low. The SSEL3 pin is active low."]
851    #[inline(always)]
852    pub fn low(self) -> &'a mut W {
853        self.variant(SPOL3_A::LOW)
854    }
855    #[doc = "High. The SSEL3 pin is active high."]
856    #[inline(always)]
857    pub fn high(self) -> &'a mut W {
858        self.variant(SPOL3_A::HIGH)
859    }
860    #[doc = r"Sets the field bit"]
861    #[inline(always)]
862    pub fn set_bit(self) -> &'a mut W {
863        self.bit(true)
864    }
865    #[doc = r"Clears the field bit"]
866    #[inline(always)]
867    pub fn clear_bit(self) -> &'a mut W {
868        self.bit(false)
869    }
870    #[doc = r"Writes raw bits to the field"]
871    #[inline(always)]
872    pub fn bit(self, value: bool) -> &'a mut W {
873        self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
874        self.w
875    }
876}
877impl R {
878    #[doc = "Bit 0 - SPI enable."]
879    #[inline(always)]
880    pub fn enable(&self) -> ENABLE_R {
881        ENABLE_R::new((self.bits & 0x01) != 0)
882    }
883    #[doc = "Bit 2 - Master mode select."]
884    #[inline(always)]
885    pub fn master(&self) -> MASTER_R {
886        MASTER_R::new(((self.bits >> 2) & 0x01) != 0)
887    }
888    #[doc = "Bit 3 - LSB First mode enable."]
889    #[inline(always)]
890    pub fn lsbf(&self) -> LSBF_R {
891        LSBF_R::new(((self.bits >> 3) & 0x01) != 0)
892    }
893    #[doc = "Bit 4 - Clock Phase select."]
894    #[inline(always)]
895    pub fn cpha(&self) -> CPHA_R {
896        CPHA_R::new(((self.bits >> 4) & 0x01) != 0)
897    }
898    #[doc = "Bit 5 - Clock Polarity select."]
899    #[inline(always)]
900    pub fn cpol(&self) -> CPOL_R {
901        CPOL_R::new(((self.bits >> 5) & 0x01) != 0)
902    }
903    #[doc = "Bit 7 - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
904    #[inline(always)]
905    pub fn loop_(&self) -> LOOP_R {
906        LOOP_R::new(((self.bits >> 7) & 0x01) != 0)
907    }
908    #[doc = "Bit 8 - SSEL0 Polarity select."]
909    #[inline(always)]
910    pub fn spol0(&self) -> SPOL0_R {
911        SPOL0_R::new(((self.bits >> 8) & 0x01) != 0)
912    }
913    #[doc = "Bit 9 - SSEL1 Polarity select."]
914    #[inline(always)]
915    pub fn spol1(&self) -> SPOL1_R {
916        SPOL1_R::new(((self.bits >> 9) & 0x01) != 0)
917    }
918    #[doc = "Bit 10 - SSEL2 Polarity select."]
919    #[inline(always)]
920    pub fn spol2(&self) -> SPOL2_R {
921        SPOL2_R::new(((self.bits >> 10) & 0x01) != 0)
922    }
923    #[doc = "Bit 11 - SSEL3 Polarity select."]
924    #[inline(always)]
925    pub fn spol3(&self) -> SPOL3_R {
926        SPOL3_R::new(((self.bits >> 11) & 0x01) != 0)
927    }
928}
929impl W {
930    #[doc = "Bit 0 - SPI enable."]
931    #[inline(always)]
932    pub fn enable(&mut self) -> ENABLE_W {
933        ENABLE_W { w: self }
934    }
935    #[doc = "Bit 2 - Master mode select."]
936    #[inline(always)]
937    pub fn master(&mut self) -> MASTER_W {
938        MASTER_W { w: self }
939    }
940    #[doc = "Bit 3 - LSB First mode enable."]
941    #[inline(always)]
942    pub fn lsbf(&mut self) -> LSBF_W {
943        LSBF_W { w: self }
944    }
945    #[doc = "Bit 4 - Clock Phase select."]
946    #[inline(always)]
947    pub fn cpha(&mut self) -> CPHA_W {
948        CPHA_W { w: self }
949    }
950    #[doc = "Bit 5 - Clock Polarity select."]
951    #[inline(always)]
952    pub fn cpol(&mut self) -> CPOL_W {
953        CPOL_W { w: self }
954    }
955    #[doc = "Bit 7 - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing."]
956    #[inline(always)]
957    pub fn loop_(&mut self) -> LOOP_W {
958        LOOP_W { w: self }
959    }
960    #[doc = "Bit 8 - SSEL0 Polarity select."]
961    #[inline(always)]
962    pub fn spol0(&mut self) -> SPOL0_W {
963        SPOL0_W { w: self }
964    }
965    #[doc = "Bit 9 - SSEL1 Polarity select."]
966    #[inline(always)]
967    pub fn spol1(&mut self) -> SPOL1_W {
968        SPOL1_W { w: self }
969    }
970    #[doc = "Bit 10 - SSEL2 Polarity select."]
971    #[inline(always)]
972    pub fn spol2(&mut self) -> SPOL2_W {
973        SPOL2_W { w: self }
974    }
975    #[doc = "Bit 11 - SSEL3 Polarity select."]
976    #[inline(always)]
977    pub fn spol3(&mut self) -> SPOL3_W {
978        SPOL3_W { w: self }
979    }
980    #[doc = "Writes raw bits to the register."]
981    #[inline(always)]
982    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
983        self.0.bits(bits);
984        self
985    }
986}
987#[doc = "SPI Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
988pub struct CFG_SPEC;
989impl crate::RegisterSpec for CFG_SPEC {
990    type Ux = u32;
991}
992#[doc = "`read()` method returns [cfg::R](R) reader structure"]
993impl crate::Readable for CFG_SPEC {
994    type Reader = R;
995}
996#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"]
997impl crate::Writable for CFG_SPEC {
998    type Writer = W;
999}
1000#[doc = "`reset()` method sets CFG to value 0"]
1001impl crate::Resettable for CFG_SPEC {
1002    #[inline(always)]
1003    fn reset_value() -> Self::Ux {
1004        0
1005    }
1006}
lpc55_pac/spi0/cfg.rs

lpc55_pac/spi0/
cfg.rs
