1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00..0x1c - Input mux register for SCT0 input"]
5 pub sct0_inmux: [crate::Reg<sct0_inmux::SCT0_INMUX_SPEC>; 7],
6 _reserved1: [u8; 0x04],
7 #[doc = "0x20..0x30 - Capture select registers for TIMER0 inputs"]
8 pub timer0captsel: [crate::Reg<timer0captsel::TIMER0CAPTSEL_SPEC>; 4],
9 _reserved2: [u8; 0x10],
10 #[doc = "0x40..0x50 - Capture select registers for TIMER1 inputs"]
11 pub timer1captsel: [crate::Reg<timer1captsel::TIMER1CAPTSEL_SPEC>; 4],
12 _reserved3: [u8; 0x10],
13 #[doc = "0x60..0x70 - Capture select registers for TIMER2 inputs"]
14 pub timer2captsel: [crate::Reg<timer2captsel::TIMER2CAPTSEL_SPEC>; 4],
15 _reserved4: [u8; 0x50],
16 #[doc = "0xc0..0xe0 - Pin interrupt select register"]
17 pub pintsel: [crate::Reg<pintsel::PINTSEL_SPEC>; 8],
18 #[doc = "0xe0..0x13c - Trigger select register for DMA0 channel"]
19 pub dma0_itrig_inmux: [crate::Reg<dma0_itrig_inmux::DMA0_ITRIG_INMUX_SPEC>; 23],
20 _reserved6: [u8; 0x24],
21 #[doc = "0x160..0x170 - DMA0 output trigger selection to become DMA0 trigger"]
22 pub dma0_otrig_inmux: [crate::Reg<dma0_otrig_inmux::DMA0_OTRIG_INMUX_SPEC>; 4],
23 _reserved7: [u8; 0x10],
24 #[doc = "0x180 - Selection for frequency measurement reference clock"]
25 pub freqmeas_ref: crate::Reg<freqmeas_ref::FREQMEAS_REF_SPEC>,
26 #[doc = "0x184 - Selection for frequency measurement target clock"]
27 pub freqmeas_target: crate::Reg<freqmeas_target::FREQMEAS_TARGET_SPEC>,
28 _reserved9: [u8; 0x18],
29 #[doc = "0x1a0..0x1b0 - Capture select registers for TIMER3 inputs"]
30 pub timer3captsel: [crate::Reg<timer3captsel::TIMER3CAPTSEL_SPEC>; 4],
31 _reserved10: [u8; 0x10],
32 #[doc = "0x1c0..0x1d0 - Capture select registers for TIMER4 inputs"]
33 pub timer4captsel: [crate::Reg<timer4captsel::TIMER4CAPTSEL_SPEC>; 4],
34 _reserved11: [u8; 0x10],
35 #[doc = "0x1e0..0x1e8 - Pin interrupt secure select register"]
36 pub pintsecsel: [crate::Reg<pintsecsel::PINTSECSEL_SPEC>; 2],
37 _reserved12: [u8; 0x18],
38 #[doc = "0x200..0x228 - Trigger select register for DMA1 channel"]
39 pub dma1_itrig_inmux: [crate::Reg<dma1_itrig_inmux::DMA1_ITRIG_INMUX_SPEC>; 10],
40 _reserved13: [u8; 0x18],
41 #[doc = "0x240..0x250 - DMA1 output trigger selection to become DMA1 trigger"]
42 pub dma1_otrig_inmux: [crate::Reg<dma1_otrig_inmux::DMA1_OTRIG_INMUX_SPEC>; 4],
43 _reserved14: [u8; 0x04f0],
44 #[doc = "0x740 - Enable DMA0 requests"]
45 pub dma0_req_ena: crate::Reg<dma0_req_ena::DMA0_REQ_ENA_SPEC>,
46 _reserved15: [u8; 0x04],
47 #[doc = "0x748 - Set one or several bits in DMA0_REQ_ENA register"]
48 pub dma0_req_ena_set: crate::Reg<dma0_req_ena_set::DMA0_REQ_ENA_SET_SPEC>,
49 _reserved16: [u8; 0x04],
50 #[doc = "0x750 - Clear one or several bits in DMA0_REQ_ENA register"]
51 pub dma0_req_ena_clr: crate::Reg<dma0_req_ena_clr::DMA0_REQ_ENA_CLR_SPEC>,
52 _reserved17: [u8; 0x0c],
53 #[doc = "0x760 - Enable DMA1 requests"]
54 pub dma1_req_ena: crate::Reg<dma1_req_ena::DMA1_REQ_ENA_SPEC>,
55 _reserved18: [u8; 0x04],
56 #[doc = "0x768 - Set one or several bits in DMA1_REQ_ENA register"]
57 pub dma1_req_ena_set: crate::Reg<dma1_req_ena_set::DMA1_REQ_ENA_SET_SPEC>,
58 _reserved19: [u8; 0x04],
59 #[doc = "0x770 - Clear one or several bits in DMA1_REQ_ENA register"]
60 pub dma1_req_ena_clr: crate::Reg<dma1_req_ena_clr::DMA1_REQ_ENA_CLR_SPEC>,
61 _reserved20: [u8; 0x0c],
62 #[doc = "0x780 - Enable DMA0 triggers"]
63 pub dma0_itrig_ena: crate::Reg<dma0_itrig_ena::DMA0_ITRIG_ENA_SPEC>,
64 _reserved21: [u8; 0x04],
65 #[doc = "0x788 - Set one or several bits in DMA0_ITRIG_ENA register"]
66 pub dma0_itrig_ena_set: crate::Reg<dma0_itrig_ena_set::DMA0_ITRIG_ENA_SET_SPEC>,
67 _reserved22: [u8; 0x04],
68 #[doc = "0x790 - Clear one or several bits in DMA0_ITRIG_ENA register"]
69 pub dma0_itrig_ena_clr: crate::Reg<dma0_itrig_ena_clr::DMA0_ITRIG_ENA_CLR_SPEC>,
70 _reserved23: [u8; 0x0c],
71 #[doc = "0x7a0 - Enable DMA1 triggers"]
72 pub dma1_itrig_ena: crate::Reg<dma1_itrig_ena::DMA1_ITRIG_ENA_SPEC>,
73 _reserved24: [u8; 0x04],
74 #[doc = "0x7a8 - Set one or several bits in DMA1_ITRIG_ENA register"]
75 pub dma1_itrig_ena_set: crate::Reg<dma1_itrig_ena_set::DMA1_ITRIG_ENA_SET_SPEC>,
76 _reserved25: [u8; 0x04],
77 #[doc = "0x7b0 - Clear one or several bits in DMA1_ITRIG_ENA register"]
78 pub dma1_itrig_ena_clr: crate::Reg<dma1_itrig_ena_clr::DMA1_ITRIG_ENA_CLR_SPEC>,
79}
80#[doc = "SCT0_INMUX register accessor: an alias for `Reg<SCT0_INMUX_SPEC>`"]
81pub type SCT0_INMUX = crate::Reg<sct0_inmux::SCT0_INMUX_SPEC>;
82#[doc = "Input mux register for SCT0 input"]
83pub mod sct0_inmux;
84#[doc = "TIMER0CAPTSEL register accessor: an alias for `Reg<TIMER0CAPTSEL_SPEC>`"]
85pub type TIMER0CAPTSEL = crate::Reg<timer0captsel::TIMER0CAPTSEL_SPEC>;
86#[doc = "Capture select registers for TIMER0 inputs"]
87pub mod timer0captsel;
88#[doc = "TIMER1CAPTSEL register accessor: an alias for `Reg<TIMER1CAPTSEL_SPEC>`"]
89pub type TIMER1CAPTSEL = crate::Reg<timer1captsel::TIMER1CAPTSEL_SPEC>;
90#[doc = "Capture select registers for TIMER1 inputs"]
91pub mod timer1captsel;
92#[doc = "TIMER2CAPTSEL register accessor: an alias for `Reg<TIMER2CAPTSEL_SPEC>`"]
93pub type TIMER2CAPTSEL = crate::Reg<timer2captsel::TIMER2CAPTSEL_SPEC>;
94#[doc = "Capture select registers for TIMER2 inputs"]
95pub mod timer2captsel;
96#[doc = "PINTSEL register accessor: an alias for `Reg<PINTSEL_SPEC>`"]
97pub type PINTSEL = crate::Reg<pintsel::PINTSEL_SPEC>;
98#[doc = "Pin interrupt select register"]
99pub mod pintsel;
100#[doc = "DMA0_ITRIG_INMUX register accessor: an alias for `Reg<DMA0_ITRIG_INMUX_SPEC>`"]
101pub type DMA0_ITRIG_INMUX = crate::Reg<dma0_itrig_inmux::DMA0_ITRIG_INMUX_SPEC>;
102#[doc = "Trigger select register for DMA0 channel"]
103pub mod dma0_itrig_inmux;
104#[doc = "DMA0_OTRIG_INMUX register accessor: an alias for `Reg<DMA0_OTRIG_INMUX_SPEC>`"]
105pub type DMA0_OTRIG_INMUX = crate::Reg<dma0_otrig_inmux::DMA0_OTRIG_INMUX_SPEC>;
106#[doc = "DMA0 output trigger selection to become DMA0 trigger"]
107pub mod dma0_otrig_inmux;
108#[doc = "FREQMEAS_REF register accessor: an alias for `Reg<FREQMEAS_REF_SPEC>`"]
109pub type FREQMEAS_REF = crate::Reg<freqmeas_ref::FREQMEAS_REF_SPEC>;
110#[doc = "Selection for frequency measurement reference clock"]
111pub mod freqmeas_ref;
112#[doc = "FREQMEAS_TARGET register accessor: an alias for `Reg<FREQMEAS_TARGET_SPEC>`"]
113pub type FREQMEAS_TARGET = crate::Reg<freqmeas_target::FREQMEAS_TARGET_SPEC>;
114#[doc = "Selection for frequency measurement target clock"]
115pub mod freqmeas_target;
116#[doc = "TIMER3CAPTSEL register accessor: an alias for `Reg<TIMER3CAPTSEL_SPEC>`"]
117pub type TIMER3CAPTSEL = crate::Reg<timer3captsel::TIMER3CAPTSEL_SPEC>;
118#[doc = "Capture select registers for TIMER3 inputs"]
119pub mod timer3captsel;
120#[doc = "TIMER4CAPTSEL register accessor: an alias for `Reg<TIMER4CAPTSEL_SPEC>`"]
121pub type TIMER4CAPTSEL = crate::Reg<timer4captsel::TIMER4CAPTSEL_SPEC>;
122#[doc = "Capture select registers for TIMER4 inputs"]
123pub mod timer4captsel;
124#[doc = "PINTSECSEL register accessor: an alias for `Reg<PINTSECSEL_SPEC>`"]
125pub type PINTSECSEL = crate::Reg<pintsecsel::PINTSECSEL_SPEC>;
126#[doc = "Pin interrupt secure select register"]
127pub mod pintsecsel;
128#[doc = "DMA1_ITRIG_INMUX register accessor: an alias for `Reg<DMA1_ITRIG_INMUX_SPEC>`"]
129pub type DMA1_ITRIG_INMUX = crate::Reg<dma1_itrig_inmux::DMA1_ITRIG_INMUX_SPEC>;
130#[doc = "Trigger select register for DMA1 channel"]
131pub mod dma1_itrig_inmux;
132#[doc = "DMA1_OTRIG_INMUX register accessor: an alias for `Reg<DMA1_OTRIG_INMUX_SPEC>`"]
133pub type DMA1_OTRIG_INMUX = crate::Reg<dma1_otrig_inmux::DMA1_OTRIG_INMUX_SPEC>;
134#[doc = "DMA1 output trigger selection to become DMA1 trigger"]
135pub mod dma1_otrig_inmux;
136#[doc = "DMA0_REQ_ENA register accessor: an alias for `Reg<DMA0_REQ_ENA_SPEC>`"]
137pub type DMA0_REQ_ENA = crate::Reg<dma0_req_ena::DMA0_REQ_ENA_SPEC>;
138#[doc = "Enable DMA0 requests"]
139pub mod dma0_req_ena;
140#[doc = "DMA0_REQ_ENA_SET register accessor: an alias for `Reg<DMA0_REQ_ENA_SET_SPEC>`"]
141pub type DMA0_REQ_ENA_SET = crate::Reg<dma0_req_ena_set::DMA0_REQ_ENA_SET_SPEC>;
142#[doc = "Set one or several bits in DMA0_REQ_ENA register"]
143pub mod dma0_req_ena_set;
144#[doc = "DMA0_REQ_ENA_CLR register accessor: an alias for `Reg<DMA0_REQ_ENA_CLR_SPEC>`"]
145pub type DMA0_REQ_ENA_CLR = crate::Reg<dma0_req_ena_clr::DMA0_REQ_ENA_CLR_SPEC>;
146#[doc = "Clear one or several bits in DMA0_REQ_ENA register"]
147pub mod dma0_req_ena_clr;
148#[doc = "DMA1_REQ_ENA register accessor: an alias for `Reg<DMA1_REQ_ENA_SPEC>`"]
149pub type DMA1_REQ_ENA = crate::Reg<dma1_req_ena::DMA1_REQ_ENA_SPEC>;
150#[doc = "Enable DMA1 requests"]
151pub mod dma1_req_ena;
152#[doc = "DMA1_REQ_ENA_SET register accessor: an alias for `Reg<DMA1_REQ_ENA_SET_SPEC>`"]
153pub type DMA1_REQ_ENA_SET = crate::Reg<dma1_req_ena_set::DMA1_REQ_ENA_SET_SPEC>;
154#[doc = "Set one or several bits in DMA1_REQ_ENA register"]
155pub mod dma1_req_ena_set;
156#[doc = "DMA1_REQ_ENA_CLR register accessor: an alias for `Reg<DMA1_REQ_ENA_CLR_SPEC>`"]
157pub type DMA1_REQ_ENA_CLR = crate::Reg<dma1_req_ena_clr::DMA1_REQ_ENA_CLR_SPEC>;
158#[doc = "Clear one or several bits in DMA1_REQ_ENA register"]
159pub mod dma1_req_ena_clr;
160#[doc = "DMA0_ITRIG_ENA register accessor: an alias for `Reg<DMA0_ITRIG_ENA_SPEC>`"]
161pub type DMA0_ITRIG_ENA = crate::Reg<dma0_itrig_ena::DMA0_ITRIG_ENA_SPEC>;
162#[doc = "Enable DMA0 triggers"]
163pub mod dma0_itrig_ena;
164#[doc = "DMA0_ITRIG_ENA_SET register accessor: an alias for `Reg<DMA0_ITRIG_ENA_SET_SPEC>`"]
165pub type DMA0_ITRIG_ENA_SET = crate::Reg<dma0_itrig_ena_set::DMA0_ITRIG_ENA_SET_SPEC>;
166#[doc = "Set one or several bits in DMA0_ITRIG_ENA register"]
167pub mod dma0_itrig_ena_set;
168#[doc = "DMA0_ITRIG_ENA_CLR register accessor: an alias for `Reg<DMA0_ITRIG_ENA_CLR_SPEC>`"]
169pub type DMA0_ITRIG_ENA_CLR = crate::Reg<dma0_itrig_ena_clr::DMA0_ITRIG_ENA_CLR_SPEC>;
170#[doc = "Clear one or several bits in DMA0_ITRIG_ENA register"]
171pub mod dma0_itrig_ena_clr;
172#[doc = "DMA1_ITRIG_ENA register accessor: an alias for `Reg<DMA1_ITRIG_ENA_SPEC>`"]
173pub type DMA1_ITRIG_ENA = crate::Reg<dma1_itrig_ena::DMA1_ITRIG_ENA_SPEC>;
174#[doc = "Enable DMA1 triggers"]
175pub mod dma1_itrig_ena;
176#[doc = "DMA1_ITRIG_ENA_SET register accessor: an alias for `Reg<DMA1_ITRIG_ENA_SET_SPEC>`"]
177pub type DMA1_ITRIG_ENA_SET = crate::Reg<dma1_itrig_ena_set::DMA1_ITRIG_ENA_SET_SPEC>;
178#[doc = "Set one or several bits in DMA1_ITRIG_ENA register"]
179pub mod dma1_itrig_ena_set;
180#[doc = "DMA1_ITRIG_ENA_CLR register accessor: an alias for `Reg<DMA1_ITRIG_ENA_CLR_SPEC>`"]
181pub type DMA1_ITRIG_ENA_CLR = crate::Reg<dma1_itrig_ena_clr::DMA1_ITRIG_ENA_CLR_SPEC>;
182#[doc = "Clear one or several bits in DMA1_ITRIG_ENA register"]
183pub mod dma1_itrig_ena_clr;