Enum lpc55_pac::usbphy::pll_sic_set::PLL_DIV_SEL_A [−][src]
#[repr(u8)] pub enum PLL_DIV_SEL_A { VALUE0, VALUE1, VALUE2, VALUE3, VALUE4, VALUE5, VALUE6, VALUE7, }
This field controls the USB PLL feedback loop divider
Value on reset: 3
Variants
0: Divide by 13
1: Divide by 15
2: Divide by 16
3: Divide by 20
4: Divide by 22
5: Divide by 25
6: Divide by 30
7: Divide by 240
Trait Implementations
impl Clone for PLL_DIV_SEL_A
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impl Clone for PLL_DIV_SEL_A
[src]fn clone(&self) -> PLL_DIV_SEL_A
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pub fn clone_from(&mut self, source: &Self)
1.0.0[src]
impl Copy for PLL_DIV_SEL_A
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impl Copy for PLL_DIV_SEL_A
[src]impl PartialEq<PLL_DIV_SEL_A> for PLL_DIV_SEL_A
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impl PartialEq<PLL_DIV_SEL_A> for PLL_DIV_SEL_A
[src]fn eq(&self, other: &PLL_DIV_SEL_A) -> bool
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#[must_use]pub fn ne(&self, other: &Rhs) -> bool
1.0.0[src]
#[must_use]
pub fn ne(&self, other: &Rhs) -> boolimpl StructuralPartialEq for PLL_DIV_SEL_A
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impl StructuralPartialEq for PLL_DIV_SEL_A
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