Struct lpc55_pac::usart0::intenset::INTENSET_SPEC [−][src]
pub struct INTENSET_SPEC;
Interrupt Enable read and Set register for USART (not FIFO) status. Contains individual interrupt enable bits for each potential USART interrupt. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see intenset module
Trait Implementations
impl Readable for INTENSET_SPEC
[src]
impl Readable for INTENSET_SPEC
[src]read()
method returns intenset::R reader structure
impl RegisterSpec for INTENSET_SPEC
[src]
impl RegisterSpec for INTENSET_SPEC
[src]type Ux = u32
Raw register type (u8
, u16
, u32
, …).
impl Resettable for INTENSET_SPEC
[src]
impl Resettable for INTENSET_SPEC
[src]reset()
method sets INTENSET to value 0
fn reset_value() -> Self::Ux
[src]
impl Writable for INTENSET_SPEC
[src]
impl Writable for INTENSET_SPEC
[src]write(|w| ..)
method takes intenset::W writer structure