Struct lpc55_pac::syscon::systickclkdiv0::SYSTICKCLKDIV0_SPEC [−][src]
pub struct SYSTICKCLKDIV0_SPEC;
System Tick Timer divider for CPU0
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see systickclkdiv0 module
Trait Implementations
impl Readable for SYSTICKCLKDIV0_SPEC
[src]
impl Readable for SYSTICKCLKDIV0_SPEC
[src]read()
method returns systickclkdiv0::R reader structure
impl RegisterSpec for SYSTICKCLKDIV0_SPEC
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impl RegisterSpec for SYSTICKCLKDIV0_SPEC
[src]type Ux = u32
Raw register type (u8
, u16
, u32
, …).
impl Resettable for SYSTICKCLKDIV0_SPEC
[src]
impl Resettable for SYSTICKCLKDIV0_SPEC
[src]reset()
method sets SYSTICKCLKDIV0 to value 0x4000_0000
fn reset_value() -> Self::Ux
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impl Writable for SYSTICKCLKDIV0_SPEC
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impl Writable for SYSTICKCLKDIV0_SPEC
[src]write(|w| ..)
method takes systickclkdiv0::W writer structure
Auto Trait Implementations
impl Send for SYSTICKCLKDIV0_SPEC
impl Send for SYSTICKCLKDIV0_SPEC
impl Sync for SYSTICKCLKDIV0_SPEC
impl Sync for SYSTICKCLKDIV0_SPEC
impl Unpin for SYSTICKCLKDIV0_SPEC
impl Unpin for SYSTICKCLKDIV0_SPEC