Struct lpc55_pac::spi0::stat::W [−][src]
pub struct W(_);
Register STAT writer
Implementations
impl W[src]
impl W[src]pub fn ssa(&mut self) -> SSA_W<'_>[src]
Bit 4 - Slave Select Assert. This flag is set whenever any slave select transitions from deasserted to asserted, in both master and slave modes. This allows determining when the SPI transmit/receive functions become busy, and allows waking up the device from reduced power modes when a slave mode access begins. This flag is cleared by software.
pub fn ssd(&mut self) -> SSD_W<'_>[src]
Bit 5 - Slave Select Deassert. This flag is set whenever any asserted slave selects transition to deasserted, in both master and slave modes. This allows determining when the SPI transmit/receive functions become idle. This flag is cleared by software.
pub fn endtransfer(&mut self) -> ENDTRANSFER_W<'_>[src]
Bit 7 - End Transfer control bit. Software can set this bit to force an end to the current transfer when the transmitter finishes any activity already in progress, as if the EOT flag had been set prior to the last transmission. This capability is included to support cases where it is not known when transmit data is written that it will be the end of a transfer. The bit is cleared when the transmitter becomes idle as the transfer comes to an end. Forcing an end of transfer in this manner causes any specified FRAME_DELAY and TRANSFER_DELAY to be inserted.
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]
Writes raw bits to the register.