Struct lpc55_pac::spi0::fifointstat::R[][src]

pub struct R(_);

Register FIFOINTSTAT reader

Implementations

impl R[src]

pub fn txerr(&self) -> TXERR_R[src]

Bit 0 - TX FIFO error.

pub fn rxerr(&self) -> RXERR_R[src]

Bit 1 - RX FIFO error.

pub fn txlvl(&self) -> TXLVL_R[src]

Bit 2 - Transmit FIFO level interrupt.

pub fn rxlvl(&self) -> RXLVL_R[src]

Bit 3 - Receive FIFO level interrupt.

pub fn perint(&self) -> PERINT_R[src]

Bit 4 - Peripheral interrupt.

Methods from Deref<Target = R<FIFOINTSTAT_SPEC>>

pub fn bits(&self) -> REG::Ux[src]

Reads raw bits from register.

Trait Implementations

impl Deref for R[src]

type Target = R<FIFOINTSTAT_SPEC>

The resulting type after dereferencing.

impl From<R<FIFOINTSTAT_SPEC>> for R[src]

Auto Trait Implementations

impl Send for R

impl Sync for R

impl Unpin for R

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.