Enum lpc55_pac::prince::lock::LOCKREG1_A[][src]

pub enum LOCKREG1_A {
    DISABLED,
    ENABLED,
}

Lock Region 1 registers.

Value on reset: 0

Variants

DISABLED

0: Disabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are writable..

ENABLED

1: Enabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are not writable..

Trait Implementations

impl Clone for LOCKREG1_A[src]

impl Copy for LOCKREG1_A[src]

impl Debug for LOCKREG1_A[src]

impl PartialEq<LOCKREG1_A> for LOCKREG1_A[src]

impl StructuralPartialEq for LOCKREG1_A[src]

Auto Trait Implementations

impl Send for LOCKREG1_A

impl Sync for LOCKREG1_A

impl Unpin for LOCKREG1_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.