Enum lpc55_pac::prince::lock::LOCKREG0_A [−][src]
pub enum LOCKREG0_A { DISABLED, ENABLED, }
Lock Region 0 registers.
Value on reset: 0
Variants
0: Disabled. IV_LSB0, IV_MSB0, BASE_ADDR0, and SR_ENABLE0 are writable..
1: Enabled. IV_LSB0, IV_MSB0, BASE_ADDR0, and SR_ENABLE0 are not writable..
Trait Implementations
impl Clone for LOCKREG0_A
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impl Clone for LOCKREG0_A
[src]fn clone(&self) -> LOCKREG0_A
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pub fn clone_from(&mut self, source: &Self)
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impl Copy for LOCKREG0_A
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impl Copy for LOCKREG0_A
[src]impl PartialEq<LOCKREG0_A> for LOCKREG0_A
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impl PartialEq<LOCKREG0_A> for LOCKREG0_A
[src]fn eq(&self, other: &LOCKREG0_A) -> bool
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#[must_use]pub fn ne(&self, other: &Rhs) -> bool
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#[must_use]
pub fn ne(&self, other: &Rhs) -> boolimpl StructuralPartialEq for LOCKREG0_A
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impl StructuralPartialEq for LOCKREG0_A
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