Struct lpc55_pac::i2s0::fifointenset::W [−][src]
pub struct W(_);
Register FIFOINTENSET
writer
Implementations
impl W
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impl W
[src]pub fn txerr(&mut self) -> TXERR_W<'_>
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Bit 0 - Determines whether an interrupt occurs when a transmit error occurs, based on the TXERR flag in the FIFOSTAT register.
pub fn rxerr(&mut self) -> RXERR_W<'_>
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Bit 1 - Determines whether an interrupt occurs when a receive error occurs, based on the RXERR flag in the FIFOSTAT register.
pub fn txlvl(&mut self) -> TXLVL_W<'_>
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Bit 2 - Determines whether an interrupt occurs when a the transmit FIFO reaches the level specified by the TXLVL field in the FIFOTRIG register.
pub fn rxlvl(&mut self) -> RXLVL_W<'_>
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Bit 3 - Determines whether an interrupt occurs when a the receive FIFO reaches the level specified by the TXLVL field in the FIFOTRIG register.
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register.
Methods from Deref<Target = W<FIFOINTENSET_SPEC>>
Trait Implementations
impl From<W<FIFOINTENSET_SPEC>> for W
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impl From<W<FIFOINTENSET_SPEC>> for W
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