Struct lpc55_pac::flash_cmpa::cc_socu_dflt::W [−][src]
pub struct W(_);
Register CC_SOCU_DFLT
writer
Implementations
impl W
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impl W
[src]pub fn niden(&mut self) -> NIDEN_W<'_>
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Bit 0 - Non Secure non-invasive debug fixed state
pub fn dbgen(&mut self) -> DBGEN_W<'_>
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Bit 1 - Non Secure debug fixed state
pub fn spniden(&mut self) -> SPNIDEN_W<'_>
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Bit 2 - Secure non-invasive debug fixed state
pub fn spiden(&mut self) -> SPIDEN_W<'_>
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Bit 3 - Secure invasive debug fixed state
pub fn tapen(&mut self) -> TAPEN_W<'_>
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Bit 4 - JTAG TAP fixed state
pub fn cpu1_dbgen(&mut self) -> CPU1_DBGEN_W<'_>
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Bit 5 - CPU1 (Micro cortex M33) invasive debug fixed state
pub fn isp_cmd_en(&mut self) -> ISP_CMD_EN_W<'_>
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Bit 6 - ISP Boot Command fixed state
pub fn fa_cmd_en(&mut self) -> FA_CMD_EN_W<'_>
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Bit 7 - FA Command fixed state
pub fn me_cmd_en(&mut self) -> ME_CMD_EN_W<'_>
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Bit 8 - Flash Mass Erase Command fixed state
pub fn cpu1_niden(&mut self) -> CPU1_NIDEN_W<'_>
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Bit 9 - CPU1 (Micro cortex M33) non-invasive debug fixed state
pub fn inverse_value(&mut self) -> INVERSE_VALUE_W<'_>
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Bits 16:31 - inverse value of bits [15:0]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register.
Methods from Deref<Target = W<CC_SOCU_DFLT_SPEC>>
Trait Implementations
impl From<W<CC_SOCU_DFLT_SPEC>> for W
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impl From<W<CC_SOCU_DFLT_SPEC>> for W
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