Enum lpc55_pac::ctimer0::ctcr::SELCC_A [−][src]
#[repr(u8)] pub enum SELCC_A { CHANNEL_0_RISING, CHANNEL_0_FALLING, CHANNEL_1_RISING, CHANNEL_1_FALLING, CHANNEL_2_RISING, CHANNEL_2_FALLING, }
Edge select. When bit 4 is 1, these bits select which capture input edge will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is low. Values 0x2 to 0x3 and 0x6 to 0x7 are reserved.
Value on reset: 0
Variants
0: Channel 0 Rising Edge. Rising edge of the signal on capture channel 0 clears the timer (if bit 4 is set).
1: Channel 0 Falling Edge. Falling edge of the signal on capture channel 0 clears the timer (if bit 4 is set).
2: Channel 1 Rising Edge. Rising edge of the signal on capture channel 1 clears the timer (if bit 4 is set).
3: Channel 1 Falling Edge. Falling edge of the signal on capture channel 1 clears the timer (if bit 4 is set).
4: Channel 2 Rising Edge. Rising edge of the signal on capture channel 2 clears the timer (if bit 4 is set).
5: Channel 2 Falling Edge. Falling edge of the signal on capture channel 2 clears the timer (if bit 4 is set).
Trait Implementations
impl Clone for SELCC_A
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impl Clone for SELCC_A
[src]fn clone(&self) -> SELCC_A
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pub fn clone_from(&mut self, source: &Self)
1.0.0[src]
impl StructuralPartialEq for SELCC_A
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impl StructuralPartialEq for SELCC_A
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