Struct lpc55_pac::casper::ctrl1::CTRL1_SPEC [−][src]
pub struct CTRL1_SPEC;
Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR.
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see ctrl1 module
Trait Implementations
impl Readable for CTRL1_SPEC
[src]
impl Readable for CTRL1_SPEC
[src]read()
method returns ctrl1::R reader structure
impl RegisterSpec for CTRL1_SPEC
[src]
impl RegisterSpec for CTRL1_SPEC
[src]type Ux = u32
Raw register type (u8
, u16
, u32
, …).
impl Resettable for CTRL1_SPEC
[src]
impl Resettable for CTRL1_SPEC
[src]reset()
method sets CTRL1 to value 0