[][src]Type Definition lpc55_pac::ahb_secure_ctrl::sec_ctrl_ahb_port8_slave1_rule::R

type R = R<u32, SEC_CTRL_AHB_PORT8_SLAVE1_RULE>;

Reader of register SEC_CTRL_AHB_PORT8_SLAVE1_RULE

Implementations

impl R[src]

pub fn flexcomm2_rule(&self) -> FLEXCOMM2_RULE_R[src]

Bits 0:1 - Flexcomm interface 2

pub fn flexcomm3_rule(&self) -> FLEXCOMM3_RULE_R[src]

Bits 4:5 - Flexcomm interface 3

pub fn flexcomm4_rule(&self) -> FLEXCOMM4_RULE_R[src]

Bits 8:9 - Flexcomm interface 4

pub fn mailbox_rule(&self) -> MAILBOX_RULE_R[src]

Bits 12:13 - Inter CPU communication Mailbox

pub fn gpio0_rule(&self) -> GPIO0_RULE_R[src]

Bits 16:17 - High Speed GPIO