Type Definition lpc55_pac::ahb_secure_ctrl::sec_ctrl_ahb_port10_slave0_rule::W

type W = W<u32, SEC_CTRL_AHB_PORT10_SLAVE0_RULE>;

Writer for register SEC_CTRL_AHB_PORT10_SLAVE0_RULE

Implementations

impl W

pub fn adc_rule(&mut self) -> ADC_RULE_W<'_>

Bits 0:1 - ADC

pub fn usb_fs_host_rule(&mut self) -> USB_FS_HOST_RULE_W<'_>

Bits 8:9 - USB Full Speed Host registers.

pub fn usb_hs_host_rule(&mut self) -> USB_HS_HOST_RULE_W<'_>

Bits 12:13 - USB High speed host registers

pub fn hash_rule(&mut self) -> HASH_RULE_W<'_>

Bits 16:17 - SHA-2 crypto registers

pub fn casper_rule(&mut self) -> CASPER_RULE_W<'_>

Bits 20:21 - RSA/ECC crypto accelerator

pub fn pq_rule(&mut self) -> PQ_RULE_W<'_>

Bits 24:25 - Power Quad (CPU0 processor hardware accelerator)

pub fn dma1_rule(&mut self) -> DMA1_RULE_W<'_>

Bits 28:29 - DMA Controller (Secure)